From patchwork Mon Oct 31 11:56:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony Lindgren X-Patchwork-Id: 913 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp2271920wru; Mon, 31 Oct 2022 05:07:43 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4oWB2vhmvny9PHuSok5vUoJa2YiszVjtFVG0la1DgMJODLzoXpIOcRdA/z5uEtjydbq33Y X-Received: by 2002:a17:906:846b:b0:7ad:88f8:469a with SMTP id hx11-20020a170906846b00b007ad88f8469amr12513360ejc.519.1667218063682; Mon, 31 Oct 2022 05:07:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1667218063; cv=none; d=google.com; s=arc-20160816; b=N9SX0R5lV+4E+NVQVg713LPnnAllxj45G/j6NvDComfjSwOEldnZwqAuvxl85Fgh7v ggFPnUyZmjkRJgUO3ew4Ce/RUehyEohhUiranhCls9upR3+QcrtplrPwzUI8qXWKf3LO 8nSIwZAOgPitVCBntVPK1YJeCgFfcuA9AX0+eFAA5T+j6wq4gS1J0fS9juJ1kLO44A+M UTW2VtK71N0apTCpQ0vgJEs6rnl6ZXcOO7cXi78i6Ed/SK80fnNUr/1kJSkJ37HuSgkI 6stWEF7PK6uTdDOk0CI4B5yap3QsTkS3fvTd7XVT+L6+tN4+GRt4DzfUIMpJiCpraWqN ChfA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=CC8ae22M8WgsrudpduEieViisvVkPo5W2D2ur1tT//s=; b=peVS6Uh6ZgyBsbAdJcDBa31IUOQx37uIszrfDlJXgW4gvzuwxIHu5UWdRMRp3r1taX uhjtleA2HVUD1TDlc7cALH6ew+h4PmYFGvyNIpgyeJDU2AlD5A523FGewrLCybwfhDCQ b68q3LgC/guOqPYU/S88Dw40FNFNC/SZY8+l6kNrYuICN7nQlVC/9O9K2x/lp0FFzqvp gnXFDlp5Got6rus8oAo7l2kpWcvLnPXTiPTxMKZUpnU7cbDJXUNvl5jtsnUW+ANyaSjf sX+rFJOoMuZevfB4LaNpf0p9H/PyWCNBUPIMudazBlyBCew4MOUyj0RAG3YMzljKZl8W Mq0Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id m11-20020a170906258b00b0078badb3816dsi6948487ejb.952.2022.10.31.05.07.17; Mon, 31 Oct 2022 05:07:43 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231171AbiJaL4Y (ORCPT + 99 others); Mon, 31 Oct 2022 07:56:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55386 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229826AbiJaL4X (ORCPT ); Mon, 31 Oct 2022 07:56:23 -0400 Received: from muru.com (muru.com [72.249.23.125]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 5AEADD85; Mon, 31 Oct 2022 04:56:22 -0700 (PDT) Received: from hillo.muru.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTP id 273F780CD; Mon, 31 Oct 2022 11:46:50 +0000 (UTC) From: Tony Lindgren To: Daniel Lezcano , Thomas Gleixner Cc: Georgi Vlaev , Grygorii Strashko , Keerthy , Ladislav Michl , Nishanth Menon , Suman Anna , Vignesh Raghavendra , linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH 0/3] Make TI dmtimer features more usable Date: Mon, 31 Oct 2022 13:56:10 +0200 Message-Id: <20221031115613.56229-1-tony@atomide.com> X-Mailer: git-send-email 2.37.3 MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748204848310035790?= X-GMAIL-MSGID: =?utf-8?q?1748204848310035790?= Hi all, The TI dmtimer has been using a custom API to expose some hardware timer features for PWM and remoteproc so far with struct omap_dm_timer_ops. It seems that for most part we can nowadays replace most of the custom API with chained interrupts and clock provider features. There are lots of the dmtimer instances on TI SoCs, some have tens of them. Some timers have an IO pad available, which means the timers could be used as clock output for an external device with a 50% duty cycle. The timers also have input capture capability, but that is not currently supported. There have been some patches posted earlier for the PWM capture support though. These patches are against v6.1-rc2, and need also the following pending patch: [PATCH] clocksource/drivers/timer-ti-dm: Clear settings on probe and free For am6, these patches depend on the pending dts changes posted earlier: [PATCH v3 0/2] Configure dmtimers for am65 [PATCH 1/2] arm64: dts: ti: k3-am62: Add general purpose timers for am62 I have only lightly tested this so far to make sure I get clock output on k3-am625-sk on TIMER_IO2 at user expansion connector pin 10. I have not worried at all so far about disabling the legacy API if used with interrupts and clock framework. Regards, Tony Tony Lindgren (3): clocksource/drivers/timer-ti-dm: Add lock for register access clocksource/drivers/timer-ti-dm: Implement chained irq clocksource/drivers/timer-ti-dm: Add clock provider support drivers/clocksource/timer-ti-dm.c | 591 +++++++++++++++++++++++++++++- drivers/pwm/pwm-omap-dmtimer.c | 1 + include/clocksource/timer-ti-dm.h | 2 + 3 files changed, 578 insertions(+), 16 deletions(-)