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[RFC,0/3] Make TI dmtimer features more usable

Message ID 20221031115613.56229-1-tony@atomide.com
Headers
Series Make TI dmtimer features more usable |

Message

Tony Lindgren Oct. 31, 2022, 11:56 a.m. UTC 
  Hi all,

The TI dmtimer has been using a custom API to expose some hardware timer
features for PWM and remoteproc so far with struct omap_dm_timer_ops. It
seems that for most part we can nowadays replace most of the custom API
with chained interrupts and clock provider features.

There are lots of the dmtimer instances on TI SoCs, some have tens of
them. Some timers have an IO pad available, which means the timers could
be used as clock output for an external device with a 50% duty cycle. The
timers also have input capture capability, but that is not currently
supported. There have been some patches posted earlier for the PWM capture
support though.

These patches are against v6.1-rc2, and need also the following pending
patch:

[PATCH] clocksource/drivers/timer-ti-dm: Clear settings on probe and free

For am6, these patches depend on the pending dts changes posted earlier:

[PATCH v3 0/2] Configure dmtimers for am65
[PATCH 1/2] arm64: dts: ti: k3-am62: Add general purpose timers for am62

I have only lightly tested this so far to make sure I get clock output on
k3-am625-sk on TIMER_IO2 at user expansion connector pin 10. I have not
worried at all so far about disabling the legacy API if used with
interrupts and clock framework.

Regards,

Tony


Tony Lindgren (3):
  clocksource/drivers/timer-ti-dm: Add lock for register access
  clocksource/drivers/timer-ti-dm: Implement chained irq
  clocksource/drivers/timer-ti-dm: Add clock provider support

 drivers/clocksource/timer-ti-dm.c | 591 +++++++++++++++++++++++++++++-
 drivers/pwm/pwm-omap-dmtimer.c    |   1 +
 include/clocksource/timer-ti-dm.h |   2 +
 3 files changed, 578 insertions(+), 16 deletions(-)

Comments

Tony Lindgren Oct. 31, 2022, 12:07 p.m. UTC | #1 
* Tony Lindgren <tony@atomide.com> [221031 11:46]:
> I have only lightly tested this so far to make sure I get clock output on
> k3-am625-sk on TIMER_IO2 at user expansion connector pin 10.

For reference, I used something like the patch below to configure the timer2
for clock output.

Regards,

Tony

8< ---------------------
diff --git a/arch/arm64/boot/dts/ti/k3-am625-sk.dts b/arch/arm64/boot/dts/ti/k3-am625-sk.dts
--- a/arch/arm64/boot/dts/ti/k3-am625-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am625-sk.dts
@@ -143,6 +143,25 @@ led-0 {
 			default-state = "off";
 		};
 	};
+
+	main_pwm2: dmtimer-main-pwm-2 {
+		pinctrl-0 = <&main_timer2_pins_default>;
+		pinctrl-names = "default";
+		compatible = "ti,omap-dmtimer-pwm";
+		#pwm-cells = <3>;
+		ti,timers = <&main_timer2>;
+		interrupts-extended = <&main_timer2 2 IRQ_TYPE_EDGE_RISING>,
+				      <&main_timer2 1 IRQ_TYPE_EDGE_RISING>,
+				      <&main_timer2 0 IRQ_TYPE_EDGE_RISING>;
+		interrupt-names = "compare", "overflow", "match";
+		clocks = <&main_timer2>;
+	};
+};
+
+&main_timer2 {
+	interrupt-controller;
+	#interrupt-cells = <2>;
+	#clock-cells = <0>;
 };
 
 &main_pmx0 {
@@ -270,6 +289,13 @@ AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */
 		>;
 	};
 
+	main_timer2_pins_default: main-timer2-pins-default {
+		pinctrl-single,pins = <
+			/* (C15) PADCFG_CTRL_PADCONFIG118 0x000f41d8 TIMER_IO2 */
+			AM65X_IOPAD(0x1d8, PIN_OUTPUT, 2)
+		>;
+	};
+
 	main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-pins-default {
 		pinctrl-single,pins = <
 			AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */