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Tue, 25 Oct 2022 01:52:45 -0500 Received: from SATLEXMB04.amd.com (10.181.40.145) by SATLEXMB08.amd.com (10.181.40.132) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.31; Mon, 24 Oct 2022 23:52:45 -0700 Received: from xhdbharatku40.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2375.31 via Frontend Transport; Tue, 25 Oct 2022 01:52:42 -0500 From: Thippeswamy Havalige To: , , , CC: , , , , , "Thippeswamy Havalige" Subject: [PATCH 00/13] Remove unused microblaze PCIe bus architecture Date: Tue, 25 Oct 2022 12:22:01 +0530 Message-ID: <20221025065214.4663-1-thippeswamy.havalige@amd.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT066:EE_|DM6PR12MB4532:EE_ X-MS-Office365-Filtering-Correlation-Id: 09e5c6d0-7fa6-4f8d-1eaf-08dab6558810 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Oct 2022 06:52:49.6798 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 09e5c6d0-7fa6-4f8d-1eaf-08dab6558810 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT066.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4532 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747641529655481104?= X-GMAIL-MSGID: =?utf-8?q?1747641529655481104?= The current Xilinx AXI PCIe Host Bridge driver uses generic PCIe subsystem framework. This driver works on both Microblaze and Zynq architecture based platforms. The microblaze architecture specific code has unused PCIe host bridge supported API's which are no longer needed. This series of patch removes unused architecture specific microblaze PCIe code. Thippeswamy Havalige (13): microblaze/PCI: Remove unused early_read_config_byte() et al declarations microblaze/PCI: Remove Null PCI config access unused functions microblaze/PCI: Remove unused PCI bus scan if configured as a host microblaze/PCI: Remove unused PCI legacy IO's access on a bus microblaze/PCI: Remove unused device tree parsing for a host bridge resources microblaze/PCI: Remove unused allocation & free of PCI host bridge structure microblaze/PCI: Remove unused PCI BIOS resource allocation microblaze/PCI: Remove unused PCI Indirect ops microblaze/PCI: Remove unused pci_address_to_pio() conversion of CPU address to I/O port microblaze/PCI: Remove unused sys_pciconfig_iobase() and et al declaration microblaze/PCI: Remove unused pci_iobar_pfn() and et al declarations microblaze/PCI: Remove support for Xilinx PCI host bridge microblaze/PCI: Moving PCI iounmap and dependent code arch/microblaze/Kconfig | 8 - arch/microblaze/include/asm/pci-bridge.h | 92 --- arch/microblaze/include/asm/pci.h | 29 - arch/microblaze/pci/Makefile | 3 +- arch/microblaze/pci/indirect_pci.c | 158 ----- arch/microblaze/pci/iomap.c | 36 + arch/microblaze/pci/pci-common.c | 1067 ------------------------------ arch/microblaze/pci/xilinx_pci.c | 170 ----- 8 files changed, 37 insertions(+), 1526 deletions(-) delete mode 100644 arch/microblaze/pci/indirect_pci.c delete mode 100644 arch/microblaze/pci/pci-common.c delete mode 100644 arch/microblaze/pci/xilinx_pci.c