Message ID | 20221021172932.16731-1-r-ravikumar@ti.com |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id j18-20020a170902da9200b001853b9b277bsi27818333plx.527.2022.10.21.10.30.59; Fri, 21 Oct 2022 10:31:13 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=P9FlV5OL; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230294AbiJUR37 (ORCPT <rfc822;mntrajkot1@gmail.com> + 99 others); Fri, 21 Oct 2022 13:29:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51132 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230063AbiJUR3u (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Fri, 21 Oct 2022 13:29:50 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DA56518379; Fri, 21 Oct 2022 10:29:47 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29LHTaWj063703; Fri, 21 Oct 2022 12:29:36 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1666373376; bh=yJ1a2uIXNnl8AiOznrW7lPKhvkHEPXjlhYuAW1/ip8k=; h=From:To:CC:Subject:Date; b=P9FlV5OL8hmt5E+2ATDjTCzfiK6WhyNccA7tGqizFXgsqK7M4+p1/+nM0M0cwajXF CUNYbt4qI8toacEihrtEt/dHTz/UEP8Motm4R5l4fs156yKBJ5F3gnOYHEmV7jmghy c3ditlBImlgGlHLHnW1tMa5yX2oUme8tQkaixGWw= Received: from DFLE103.ent.ti.com (dfle103.ent.ti.com [10.64.6.24]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 29LHTaHY107117 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 21 Oct 2022 12:29:36 -0500 Received: from DFLE106.ent.ti.com (10.64.6.27) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Fri, 21 Oct 2022 12:29:36 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Fri, 21 Oct 2022 12:29:36 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29LHTYrg011170; Fri, 21 Oct 2022 12:29:35 -0500 From: Rahul T R <r-ravikumar@ti.com> To: <nm@ti.com> CC: <vigneshr@ti.com>, <kristo@kernel.org>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <linux-arm-kernel@lists.infradead.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <r-ravikumar@ti.com>, <jkridner@gmail.com> Subject: [PATCH v6 0/2] Enable RPi header on j721e sk Date: Fri, 21 Oct 2022 22:59:30 +0530 Message-ID: <20221021172932.16731-1-r-ravikumar@ti.com> X-Mailer: git-send-email 2.38.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747319231541920302?= X-GMAIL-MSGID: =?utf-8?q?1747319231541920302?= |
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Enable RPi header on j721e sk
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Message
Rahul T R
Oct. 21, 2022, 5:29 p.m. UTC
The following series of patches enables RPi header on j721e sk. It is a 40 pin io expasion header which brings out i2c5, ehrpwm 2,3 and some pins of gpio 0,1 v6: - Rebased to 6.1-rc1 v5: - Enable only gpio's and i2c on the RPi Header as per the discussion in the v4 v4: - Correct the node name in dt binding example v3: - Change node name from clock to clock-controller - Add correct description for clock-controller node v2: - Add full path for clock property $ref - Remove the discription for clock pattern property, since $ref is added - Remove the label in the example - Fix the indentation in the example Sinthu Raja (1): arm64: dts: ti: k3-j721e-sk: Add pinmux for RPi Header Vijay Pothukuchi (1): arm64: dts: ti: k3-j721e-*: Add dts nodes for EHRPWMs .../dts/ti/k3-j721e-common-proc-board.dts | 24 ++++++ arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 62 ++++++++++++++- arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 79 ++++++++++++++++++- 3 files changed, 163 insertions(+), 2 deletions(-)
Comments
On 22:59-20221021, Rahul T R wrote: > The following series of patches enables RPi header > on j721e sk. It is a 40 pin io expasion header which > brings out i2c5, ehrpwm 2,3 and some pins of gpio 0,1 > > v6: > - Rebased to 6.1-rc1 Now that the cleanups are in place, we'd need one additional rebase please.
Hi Nishanth, On 23:41-20221102, Nishanth Menon wrote: > On 22:59-20221021, Rahul T R wrote: > > The following series of patches enables RPi header > > on j721e sk. It is a 40 pin io expasion header which > > brings out i2c5, ehrpwm 2,3 and some pins of gpio 0,1 > > > > v6: > > - Rebased to 6.1-rc1 > > Now that the cleanups are in place, we'd need one additional rebase > please. > I have rebased and sent v7 Regards Rahul T R > -- > Regards, > Nishanth Menon > Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D