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([172.25.112.68]) by orsmga005.jf.intel.com with ESMTP; 19 Oct 2022 03:46:20 -0700 From: Xin Li <xin3.li@intel.com> To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, peterz@infradead.org, brgerst@gmail.com, chang.seok.bae@intel.com Subject: [PATCH v4 0/5] x86: Enable LKGS instruction Date: Wed, 19 Oct 2022 03:23:05 -0700 Message-Id: <20221019102310.1543-1-xin3.li@intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747115049338189926?= X-GMAIL-MSGID: =?utf-8?q?1747115049338189926?= |
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x86: Enable LKGS instruction
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Message
Li, Xin3
Oct. 19, 2022, 10:23 a.m. UTC
LKGS instruction is introduced with Intel FRED (flexible return and event delivery) specification https://cdrdv2.intel.com/v1/dl/getContent/678938. LKGS is independent of FRED, so we enable it as a standalone CPU feature. LKGS behaves like the MOV to GS instruction except that it loads the base address into the IA32_KERNEL_GS_BASE MSR instead of the GS segment’s descriptor cache, which is exactly what Linux kernel does to load user level GS base. Thus, with LKGS, there is no need to SWAPGS away from the kernel GS base. Changes since v3: * We want less ASM not more, thus keep local_irq_save/restore() inside native_load_gs_index() (Thomas Gleixner). * For paravirt enabled kernels, initialize pv_ops.cpu.load_gs_index to native_lkgs (Thomas Gleixner). Changes since V2: * Add "" not to show "lkgs" in /proc/cpuinfo (Chang S. Bae). * Mark DI as input and output (+D) as in V1, since the exception handler modifies it (Brian Gerst). Changes since V1: * Use EX_TYPE_ZERO_REG instead of fixup code in the obsolete .fixup code section (Peter Zijlstra). * Add a comment that states the LKGS_DI macro will be repalced with "lkgs %di" once the binutils support the LKGS instruction (Peter Zijlstra). H. Peter Anvin (Intel) (5): x86/cpufeature: add the cpu feature bit for LKGS x86/opcode: add the LKGS instruction to x86-opcode-map x86/gsseg: make asm_load_gs_index() take an u16 x86/gsseg: move load_gs_index() to its own new header file x86/gsseg: use the LKGS instruction if available for load_gs_index() arch/x86/entry/entry_64.S | 2 +- arch/x86/ia32/ia32_signal.c | 1 + arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/include/asm/gsseg.h | 66 ++++++++++++++++++++++++ arch/x86/include/asm/mmu_context.h | 1 + arch/x86/include/asm/special_insns.h | 21 -------- arch/x86/kernel/cpu/common.c | 1 + arch/x86/kernel/paravirt.c | 1 + arch/x86/kernel/tls.c | 1 + arch/x86/lib/x86-opcode-map.txt | 1 + tools/arch/x86/include/asm/cpufeatures.h | 1 + tools/arch/x86/lib/x86-opcode-map.txt | 1 + 12 files changed, 76 insertions(+), 22 deletions(-) create mode 100644 arch/x86/include/asm/gsseg.h
Comments
Xin, On Wed, Oct 19 2022 at 03:23, Xin Li wrote: > LKGS instruction is introduced with Intel FRED (flexible return and event > delivery) specification https://cdrdv2.intel.com/v1/dl/getContent/678938. So I have two versions of the same thing in my inbox now. What's the difference?
> On Wed, Oct 19 2022 at 03:23, Xin Li wrote: > > LKGS instruction is introduced with Intel FRED (flexible return and > > event > > delivery) specification https://cdrdv2.intel.com/v1/dl/getContent/678938. > > So I have two versions of the same thing in my inbox now. What's the > difference? No difference at all. Sorry for the confusion, but maybe I have an excuse. A few days ago, I sent an email to the LKML and it seems lost. I got to know it until Nathan Chancellor replied; and my original message doesn't show up here: https://lore.kernel.org/all/Y02eZ6A%2Fvlj8+B%2Fc@dev-arch.thelio-3990X/ Last night I sent this patch set to the LKML and waited half an hour, they still didn't show up, so I did it again, but this time both worked. I have sent an email to owner-linux-kernel@vger.kernel.org asking for help. Xin
> > On Wed, Oct 19 2022 at 03:23, Xin Li wrote: > > > LKGS instruction is introduced with Intel FRED (flexible return and > > > event > > > delivery) specification https://cdrdv2.intel.com/v1/dl/getContent/678938. > > > > So I have two versions of the same thing in my inbox now. What's the > > difference? Hi Thomas, Should I resend it? Xin > > No difference at all. > > Sorry for the confusion, but maybe I have an excuse. A few days ago, I sent an > email to the LKML and it seems lost. I got to know it until Nathan Chancellor > replied; and my original message doesn't show up here: > https://lore.kernel.org/all/Y02eZ6A%2Fvlj8+B%2Fc@dev-arch.thelio-3990X/ > > Last night I sent this patch set to the LKML and waited half an hour, they still > didn't show up, so I did it again, but this time both worked. > > I have sent an email to owner-linux-kernel@vger.kernel.org asking for help. > > Xin