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[2620:137:e000::1:20]) by mx.google.com with ESMTP id cs16-20020a170906dc9000b0078d9f02b452si489136ejc.861.2022.10.14.15.11.13; Fri, 14 Oct 2022 15:11:39 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b=XavsfDs1; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229607AbiJNWKn (ORCPT <rfc822;ouuuleilei@gmail.com> + 99 others); Fri, 14 Oct 2022 18:10:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44588 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229462AbiJNWKl (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Fri, 14 Oct 2022 18:10:41 -0400 Received: from alexa-out-sd-01.qualcomm.com (alexa-out-sd-01.qualcomm.com [199.106.114.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 42C4AFAE5E; Fri, 14 Oct 2022 15:10:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1665785439; x=1697321439; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=+b5jKSMt/UNFX4wuKijzYEk1rNvLFnjjwvV4RNbfWkM=; b=XavsfDs1xCZRP7vOo/5ce+YuxIYYz+yB1j1Xvk0C2Sg4zETRHiZdkYrH Vn8AXjrKktBlLf+cVMQGtGS+FxLIA0dcRbodUjnA5jSIPEOnWpGszTB/c tyHd4gxfo1PCHLLXuEU4uCimonlZbNhEuQfrfN5JiGtfmf1BP7OgARCxW E=; Received: from unknown (HELO ironmsg04-sd.qualcomm.com) ([10.53.140.144]) by alexa-out-sd-01.qualcomm.com with ESMTP; 14 Oct 2022 15:10:38 -0700 X-QCInternal: smtphost Received: from nasanex01b.na.qualcomm.com ([10.46.141.250]) by ironmsg04-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Oct 2022 15:10:37 -0700 Received: from hu-molvera-sd.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Fri, 14 Oct 2022 15:10:37 -0700 From: Melody Olvera <quic_molvera@quicinc.com> To: Andy Gross <agross@kernel.org>, Bjorn Andersson <andersson@kernel.org>, Linus Walleij <linus.walleij@linaro.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> CC: <linux-arm-msm@vger.kernel.org>, <linux-gpio@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, Melody Olvera <quic_molvera@quicinc.com> Subject: [PATCH v2 0/2] Add pinctrl support for QDU1000/QRU1000 SoCs Date: Fri, 14 Oct 2022 15:10:23 -0700 Message-ID: <20221014221025.7372-1-quic_molvera@quicinc.com> X-Mailer: git-send-email 2.38.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746702695903874098?= X-GMAIL-MSGID: =?utf-8?q?1746702695903874098?= |
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Add pinctrl support for QDU1000/QRU1000 SoCs
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Message
Melody Olvera
Oct. 14, 2022, 10:10 p.m. UTC
This patchset adds pinctrl support for the Qualcomm QDU1000 and QRU1000 SoCs. The Qualcomm Technologies, Inc. Distributed Unit 1000 and Radio Unit 1000 are new SoCs meant for enabling Open RAN solutions. See more at https://www.qualcomm.com/content/dam/qcomm-martech/dm-assets/documents/qualcomm_5g_ran_platforms_product_brief.pdf Melody Olvera (2): dt-bindings: pinctrl: qcom: Add QDU1000 and QRU1000 pinctrl bindings pinctrl: qcom: Add QDU1000/QRU1000 pinctrl driver .../pinctrl/qcom,qdu1000-pinctrl.yaml | 159 ++ drivers/pinctrl/qcom/Kconfig | 9 + drivers/pinctrl/qcom/Makefile | 1 + drivers/pinctrl/qcom/pinctrl-qdu1000.c | 1274 +++++++++++++++++ 4 files changed, 1443 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,qdu1000-pinctrl.yaml create mode 100644 drivers/pinctrl/qcom/pinctrl-qdu1000.c base-commit: dca0a0385a4963145593ba417e1417af88a7c18d
Comments
On 10/14/2022 3:10 PM, Melody Olvera wrote: > This patchset adds pinctrl support for the Qualcomm QDU1000 and QRU1000 > SoCs. > > The Qualcomm Technologies, Inc. Distributed Unit 1000 and Radio Unit > 1000 are new SoCs meant for enabling Open RAN solutions. See more at > https://www.qualcomm.com/content/dam/qcomm-martech/dm-assets/documents/qualcomm_5g_ran_platforms_product_brief.pdf Changes from v1: - grouped redundant pinctrl functions - redid bindings > > Melody Olvera (2): > dt-bindings: pinctrl: qcom: Add QDU1000 and QRU1000 pinctrl bindings > pinctrl: qcom: Add QDU1000/QRU1000 pinctrl driver > > .../pinctrl/qcom,qdu1000-pinctrl.yaml | 159 ++ > drivers/pinctrl/qcom/Kconfig | 9 + > drivers/pinctrl/qcom/Makefile | 1 + > drivers/pinctrl/qcom/pinctrl-qdu1000.c | 1274 +++++++++++++++++ > 4 files changed, 1443 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,qdu1000-pinctrl.yaml > create mode 100644 drivers/pinctrl/qcom/pinctrl-qdu1000.c > > > base-commit: dca0a0385a4963145593ba417e1417af88a7c18d