[v3,0/2] Adds status interface for zynqmp-fpga

Message ID 20221013090556.741357-1-nava.kishore.manne@amd.com
Headers
Series Adds status interface for zynqmp-fpga |

Message

Manne, Nava kishore Oct. 13, 2022, 9:05 a.m. UTC
  Adds status interface for zynqmp-fpga, It's a read only interface
which allows the user to get the Programmable Logic(PL) status.
 -Device Initialization error.
 -Device internal signal error.
 -All I/Os are placed in High-Z state.
 -Device start-up sequence error.
 -Firmware error.

For more details refer the ug570.
https://docs.xilinx.com/v/u/en-US/ug570-ultrascale-configuration

Nava kishore Manne (2):
  firmware: xilinx: Add pm api function for PL config reg readback
  fpga: zynqmp-fpga: Adds status interface

 drivers/firmware/xilinx/zynqmp.c     | 35 +++++++++++
 drivers/fpga/zynqmp-fpga.c           | 87 ++++++++++++++++++++++++++++
 include/linux/firmware/xlnx-zynqmp.h | 11 ++++
 3 files changed, 133 insertions(+)