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Wed, 15 Nov 2023 12:37:08 +0000 Received: from pps.filterd (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 3AFCb5v6022061; Wed, 15 Nov 2023 12:37:05 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTPS id 3ua2pmatv1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Wed, 15 Nov 2023 12:37:05 +0000 Received: from APBLRPPMTA01.qualcomm.com (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 3AFCb4w1022050; Wed, 15 Nov 2023 12:37:04 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-msarkar-hyd.qualcomm.com [10.213.111.194]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 3AFCb45I022047; Wed, 15 Nov 2023 12:37:04 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 3891782) id 0FAA84BD5; Wed, 15 Nov 2023 18:07:03 +0530 (+0530) From: Mrinmay Sarkar To: agross@kernel.org, andersson@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, konrad.dybcio@linaro.org, mani@kernel.org, robh+dt@kernel.org Cc: quic_shazhuss@quicinc.com, quic_nitegupt@quicinc.com, quic_ramkri@quicinc.com, quic_nayiluri@quicinc.com, dmitry.baryshkov@linaro.org, robh@kernel.org, quic_krichai@quicinc.com, quic_vbadigan@quicinc.com, quic_parass@quicinc.com, quic_schintav@quicinc.com, quic_shijjose@quicinc.com, Mrinmay Sarkar , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Bjorn Helgaas , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH v3 0/3] arm64: qcom: sa8775p: add cache coherency support for SA8775P Date: Wed, 15 Nov 2023 18:06:58 +0530 Message-Id: <1700051821-1087-1-git-send-email-quic_msarkar@quicinc.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: wJlz0OUE_wLnzPJFFoeEOdiU36uWdJW4 X-Proofpoint-ORIG-GUID: wJlz0OUE_wLnzPJFFoeEOdiU36uWdJW4 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-15_11,2023-11-15_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 mlxscore=0 suspectscore=0 clxscore=1015 bulkscore=0 mlxlogscore=288 phishscore=0 adultscore=0 priorityscore=1501 malwarescore=0 impostorscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2311150097 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Wed, 15 Nov 2023 04:37:47 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782633588802290867 X-GMAIL-MSGID: 1782633588802290867 In a multiprocessor system cache snooping maintains the consistency of caches. Snooping logic is disabled from HW on this platform. Cache coherency doesn’t work without enabling this logic. This series is to enable cache snooping logic in both RC and EP driver and add the "dma-coherent" property in dtsi to support cache coherency in 8775 platform. To verify this series we required [1] [1] https://lore.kernel.org/all/1699669982-7691-1-git-send-email-quic_msarkar@quicinc.com/ v2 -> v3: - update commit message(8755 -> 8775). v1 -> v2: - update cover letter with explanation. - define each of these bits and ORing at usage time rather than directly writing value in register. Mrinmay Sarkar (3): PCI: qcom: Enable cache coherency for SA8775P RC PCI: qcom-ep: Enable cache coherency for SA8775P EP arm64: dts: qcom: sa8775p: Mark PCIe controller as cache coherent arch/arm64/boot/dts/qcom/sa8775p.dtsi | 1 + drivers/pci/controller/dwc/pcie-qcom-ep.c | 10 ++++++++++ drivers/pci/controller/dwc/pcie-qcom.c | 13 +++++++++++++ 3 files changed, 24 insertions(+)