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Tue, 31 Oct 2023 04:41:15 +0000 Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 39V4fBqY012148; Tue, 31 Oct 2023 04:41:11 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 3u0ucktta7-1; Tue, 31 Oct 2023 04:41:11 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 39V4fBiC012143; Tue, 31 Oct 2023 04:41:11 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-msarkar-hyd.qualcomm.com [10.213.111.194]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 39V4fBnB012139; Tue, 31 Oct 2023 04:41:11 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 3891782) id 1B048449C; Tue, 31 Oct 2023 10:11:10 +0530 (+0530) From: Mrinmay Sarkar To: agross@kernel.org, andersson@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, konrad.dybcio@linaro.org, mani@kernel.org Cc: quic_shazhuss@quicinc.com, quic_nitegupt@quicinc.com, quic_ramkri@quicinc.com, quic_nayiluri@quicinc.com, dmitry.baryshkov@linaro.org, robh@kernel.org, quic_krichai@quicinc.com, quic_vbadigan@quicinc.com, quic_parass@quicinc.com, quic_schintav@quicinc.com, quic_shijose@quicinc.com, Mrinmay Sarkar , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Bjorn Helgaas , Kishon Vijay Abraham I , linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev Subject: [PATCH v5 0/4] arm64: qcom: sa8775p: add cache coherency support for SA8775P Date: Tue, 31 Oct 2023 10:11:02 +0530 Message-Id: <1698727267-22131-1-git-send-email-quic_msarkar@quicinc.com> X-Mailer: git-send-email 2.7.4 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: tIhiVGtan5dR5IH_9eAPNmz2Dz4brPnF X-Proofpoint-GUID: tIhiVGtan5dR5IH_9eAPNmz2Dz4brPnF X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-30_13,2023-10-31_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 bulkscore=0 spamscore=0 suspectscore=0 lowpriorityscore=0 clxscore=1015 mlxscore=0 priorityscore=1501 phishscore=0 mlxlogscore=372 adultscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2310240000 definitions=main-2310310034 X-Spam-Status: No, score=-1.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_NONE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Mon, 30 Oct 2023 21:41:54 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781244703761487861 X-GMAIL-MSGID: 1781244703761487861 This series is to enable cache snooping logic in both RC and EP driver and add the "dma-coherent" property in dtsi to support cache coherency in SA8775P. This series adds the relavent DT bindings, new compatible string, add support to EPF driver and add EP PCIe node in dtsi file for ep pcie0 controller. v4 -> v5: - add maxItems to the respective field to constrain io space and interrupt in all variants. v3 -> v4: - add maxItems field in dt bindings - update comment in patch2 - dropped PHY driver patch as it is already applied [1] - update comment in EPF driver patch - update commect in dtsi and add iommus instead of iommu-map [1] https://lore.kernel.org/all/169804254205.383714.18423881810869732517.b4-ty@kernel.org/ v2 -> v3: - removed if/then schemas, added minItems for reg, reg-bnames, interrupt and interrupt-names instead. - adding qcom,sa8775p-pcie-ep compitable for sa8775p as we have some specific change to add. - reusing sm8450's pcs_misc num table as it is same as sa8775p. used appropriate namespace for pcs. - remove const from sa8775p_header as kernel test robot throwing some warnings due to this. - remove fallback compatiable as we are adding compatiable for sa8775p. v1 -> v2: - update description for dma - Reusing qcom,sdx55-pcie-ep compatibe so remove compaitable for sa8775p - sort the defines in phy header file and remove extra defines - add const in return type pci_epf_header and remove MHI_EPF_USE_DMA flag as hdma patch is not ready - add fallback compatiable as qcom,sdx55-pcie-ep, add iommu property Mrinmay Sarkar (4): dt-bindings: PCI: qcom-ep: Add support for SA8775P SoC PCI: qcom-ep: Add support for SA8775P SOC PCI: epf-mhi: Add support for SA8775P arm64: dts: qcom: sa8775p: Add ep pcie0 controller node .../devicetree/bindings/pci/qcom,pcie-ep.yaml | 64 +++++++++++++++++++++- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 46 ++++++++++++++++ drivers/pci/controller/dwc/pcie-qcom-ep.c | 1 + drivers/pci/endpoint/functions/pci-epf-mhi.c | 17 ++++++ 4 files changed, 126 insertions(+), 2 deletions(-)