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Tue, 27 Jun 2023 01:01:43 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 3rdsjkh3c1-1; Tue, 27 Jun 2023 01:01:43 +0000 Received: from APBLRPPMTA01.qualcomm.com (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 35R11hjh006712; Tue, 27 Jun 2023 01:01:43 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-krichai-hyd.qualcomm.com [10.213.110.112]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 35R11hNQ006663; Tue, 27 Jun 2023 01:01:43 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 4058933) id 865594AA5; Tue, 27 Jun 2023 06:31:42 +0530 (+0530) From: Krishna chaitanya chundru To: manivannan.sadhasivam@linaro.org Cc: helgaas@kernel.org, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, quic_vbadigan@quicinc.com, quic_nitegupt@quicinc.com, quic_skananth@quicinc.com, quic_ramkri@quicinc.com, krzysztof.kozlowski@linaro.org, Krishna chaitanya chundru Subject: [PATCH v5 0/3] PCI: qcom: ep: Add basic interconnect support Date: Tue, 27 Jun 2023 06:31:28 +0530 Message-Id: <1687827692-6181-1-git-send-email-quic_krichai@quicinc.com> X-Mailer: git-send-email 2.7.4 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: mo9TVmwqt8Dhcet6mh4jdMkpnyAT_A1c X-Proofpoint-ORIG-GUID: mo9TVmwqt8Dhcet6mh4jdMkpnyAT_A1c X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-26_20,2023-06-26_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 spamscore=0 impostorscore=0 mlxscore=0 malwarescore=0 priorityscore=1501 lowpriorityscore=0 bulkscore=0 mlxlogscore=552 phishscore=0 suspectscore=0 clxscore=1011 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306270007 X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769816429895129728?= X-GMAIL-MSGID: =?utf-8?q?1769816429895129728?= Add basic support for managing "pcie-mem" interconnect path by setting a low constraint before enabling clocks and updating it after the link is up based on link speed and width the device got enumerated. changes from v4: - rebased with linux-next. - Added comments as suggested by mani. - removed the arm: dts: qcom: sdx55: Add interconnect path as that patch is already applied. changes from v3: - ran make DT_CHECKER_FLAGS=-m dt_binding_check and fixed errors. - Added macros in the qcom ep driver patch as suggested by Dmitry changes from v2: - changed the logic for getting speed and width as suggested by bjorn. - fixed compilation errors. Krishna chaitanya chundru (3): dt-bindings: PCI: qcom: ep: Add interconnects path arm: dts: qcom: sdx65: Add interconnect path PCI: qcom-ep: Add ICC bandwidth voting support .../devicetree/bindings/pci/qcom,pcie-ep.yaml | 13 ++++ arch/arm/boot/dts/qcom/qcom-sdx65.dtsi | 3 + drivers/pci/controller/dwc/pcie-qcom-ep.c | 73 ++++++++++++++++++++++ 3 files changed, 89 insertions(+)