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Wed, 8 Nov 2023 12:56:44 -0300 From: Alexandre Oliva To: gcc-patches@gcc.gnu.org Cc: Rainer Orth , Mike Stump Subject: [PATCH] testsuite: adjust gomp test for x86 -m32 Organization: Free thinker, does not speak for AdaCore Date: Wed, 08 Nov 2023 12:56:44 -0300 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/27.1 (gnu/linux) MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 X-Spam-Status: No, score=-11.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE, WEIRD_QUOTING autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782011960960024612 X-GMAIL-MSGID: 1782011960960024612 declare-target-3.C expects .quad for entries in offload_var_table, but the entries are pointer-wide, so 32-bit targets use .long instead. Accept both. Regstrapped on x86_64-linux-gnu, also tested with gcc-13 on i686- and x86_64-. Ok to install? for gcc/testsuite/ChangeLog * g++.dg/gomp/declare-target-3.C: Adjust for 32-bit targets. --- gcc/testsuite/g++.dg/gomp/declare-target-3.C | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/gcc/testsuite/g++.dg/gomp/declare-target-3.C b/gcc/testsuite/g++.dg/gomp/declare-target-3.C index 1e23c8633acac..b0a90d8d31f50 100644 --- a/gcc/testsuite/g++.dg/gomp/declare-target-3.C +++ b/gcc/testsuite/g++.dg/gomp/declare-target-3.C @@ -22,10 +22,10 @@ int *g = &f; // Explicitly marked // { dg-final { scan-tree-dump "__attribute__\\\(\\\(omp declare target\\\)\\\)\\\nint bar \\\(\\\)" "gimple" } } // { dg-final { scan-tree-dump "__attribute__\\\(\\\(omp declare target\\\)\\\)\\\nint baz \\\(\\\)" "gimple" } } // { dg-final { scan-tree-dump "__attribute__\\\(\\\(omp declare target\\\)\\\)\\\nint qux \\\(\\\)" "gimple" } } -// { dg-final { scan-assembler-not "\\\.offload_var_table:\\n.+\\\.quad\\s+a" { target { offloading_enabled } } } } -// { dg-final { scan-assembler "\\\.offload_var_table:\\n.+\\\.quad\\s+b" { target { offloading_enabled } } } } -// { dg-final { scan-assembler "\\\.offload_var_table:\\n.+\\\.quad\\s+c" { target { offloading_enabled } } } } -// { dg-final { scan-assembler "\\\.offload_var_table:\\n.+\\\.quad\\s+d" { target { offloading_enabled } } } } -// { dg-final { scan-assembler "\\\.offload_var_table:\\n.+\\\.quad\\s+e" { target { offloading_enabled } } } } -// { dg-final { scan-assembler "\\\.offload_var_table:\\n.+\\\.quad\\s+f" { target { offloading_enabled } } } } -// { dg-final { scan-assembler "\\\.offload_var_table:\\n.+\\\.quad\\s+g" { target { offloading_enabled } } } } +// { dg-final { scan-assembler-not "\\\.offload_var_table:\\n.+\\\.(quad|long)\\s+a" { target { offloading_enabled } } } } +// { dg-final { scan-assembler "\\\.offload_var_table:\\n.+\\\.(quad|long)\\s+b" { target { offloading_enabled } } } } +// { dg-final { scan-assembler "\\\.offload_var_table:\\n.+\\\.(quad|long)\\s+c" { target { offloading_enabled } } } } +// { dg-final { scan-assembler "\\\.offload_var_table:\\n.+\\\.(quad|long)\\s+d" { target { offloading_enabled } } } } +// { dg-final { scan-assembler "\\\.offload_var_table:\\n.+\\\.(quad|long)\\s+e" { target { offloading_enabled } } } } +// { dg-final { scan-assembler "\\\.offload_var_table:\\n.+\\\.(quad|long)\\s+f" { target { offloading_enabled } } } } +// { dg-final { scan-assembler "\\\.offload_var_table:\\n.+\\\.(quad|long)\\s+g" { target { offloading_enabled } } } }