From patchwork Wed May 24 05:51:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Oliva X-Patchwork-Id: 98302 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp2618712vqo; Tue, 23 May 2023 22:52:49 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4tVAyitB1ppeFbmle6wzpexYpsnmCh2CvLUWpxljJ3fO2FUSjKw1k5SURbMvqs+x2W3o3h X-Received: by 2002:a17:906:9745:b0:96a:1ec1:2c9f with SMTP id o5-20020a170906974500b0096a1ec12c9fmr18458676ejy.12.1684907569788; Tue, 23 May 2023 22:52:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684907569; cv=none; d=google.com; s=arc-20160816; b=En2zbzTjjGAJv2ouYM33RCVjUfCxlojQKJQFdUq/JkMS/AkeMiO6XUcZe0Y+VRxdUo QxMuwd+M8ZFOn83NCpOREa33bOv/CWAocfJiILBGr2cFk1xt/ex+j9jQ3oK265KjIwFP WTegsZx8K1XBHe50DgnQ8muB8JXm9q3dxeAgJVwZHZXilJJbyBYzxaM0paHGItN4RRXe q2uGfCKbGUoJcHn57hLW12yJokHjXM9S7dzMhZ9hDNZ4ztcSOYWD4z517q+F/83ajX3W sL19nEdWNTNUky+4Sw/tcCR5ELbSpyI4rODHlcL22PKM/wozKO2ab6cI7KByGP4ArE5n HuRw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:reply-to:from:list-subscribe:list-help:list-post :list-archive:list-unsubscribe:list-id:precedence:mime-version :user-agent:message-id:date:organization:subject:cc:to:dmarc-filter :delivered-to:dkim-signature:dkim-filter; bh=a6T1nTwPfcxlYegTzKMk6DQ29pDn51BfWBqROomEY7w=; b=UgvG+nL+m5926oIlNGPtQzaUIaGj4EhqcATtFeoFABLP8dgizFTs4PKGfuQuECZkDr S4MoABbCnOuj2MG1U4mlzzMTd1XZInWrEG+YzxlAkxYz3d7Z7lv+gmnzskk19mq50DC7 yLaI3ND5QTK4U/m2bpaUJIkguRaeM0SkJ9fCxT9Fx2GpNDsmf8j22n3sPpIZl2g0X3EQ u0flTTuubvlV0hn3KIIl49IjmowTKYqi/U4oOtBsyOImUWcFggj2L4hfN5hGxwsdVyWF iSFvqv0ck/4KF2DnlRbiCZe30VN1ZVqg0MR7vR5+K85FsPK3CJF2oz3Bifmcr/JAhQUt 8fiQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=UkTNkcC9; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from sourceware.org (ip-8-43-85-97.sourceware.org. [8.43.85.97]) by mx.google.com with ESMTPS id gf24-20020a170906e21800b00965bde1234csi1480485ejb.25.2023.05.23.22.52.49 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 May 2023 22:52:49 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=UkTNkcC9; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id DC5F43857344 for ; Wed, 24 May 2023 05:52:39 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org DC5F43857344 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1684907559; bh=a6T1nTwPfcxlYegTzKMk6DQ29pDn51BfWBqROomEY7w=; h=To:Cc:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From:Reply-To:From; b=UkTNkcC9gV+ZaHef9K/yG42LXGfAXlO/lSJWAt74RLTBOnHIcllpH4lcVaIu3qi3O rhsCVmnM52e/zySgfsgvfrn9w84NoldJDlmGgNEnujrbAIhK+CZNtAe4qXa7f9a5jZ pvLTl7YtXBOPUb3LgWVFZgRxA0BLxfmbP4GmHCOs= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-oi1-x231.google.com (mail-oi1-x231.google.com [IPv6:2607:f8b0:4864:20::231]) by sourceware.org (Postfix) with ESMTPS id 170CC385843A for ; Wed, 24 May 2023 05:51:54 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 170CC385843A Received: by mail-oi1-x231.google.com with SMTP id 5614622812f47-397eba8b82aso389543b6e.0 for ; Tue, 23 May 2023 22:51:54 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1684907513; x=1687499513; h=mime-version:user-agent:message-id:date:errors-to:organization :subject:cc:to:from:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=a6T1nTwPfcxlYegTzKMk6DQ29pDn51BfWBqROomEY7w=; b=blrac4qQFU7MQP7hI52zkXy8xA60F704p/mLgsDBsQg4uuuvhbs3XhenGVVsgEC1Kk UmdT6mt4z/X+T1/m0u2k+dfjwkYRnNXx98/WuG1mCjg2OF1n7vZBvHK15hYgKHt2PFtC IQnDBEksia+P5YKvgyuKdrwfJeNMvNbdnPDGF8Zc2ipjnqK8K7Akrp84FlS7zFikRMPM KDiDkh11rbGOn9fnVk/iLuhaZq/JyyNYMWXRPs+lDFWVIxsMasbkIpufG2akmNSkhoWv rhILWWXsRZGyo8uRosnW5DjsV4ITsKChvZb2vTBODjQVEGR7G6Ua2VyoFbae8M61CrYP cYNA== X-Gm-Message-State: AC+VfDwx2yezxVb/QqEojTyK4WHozpKzZDO91kWnY7be1fYEASpOf5Y1 UHIOWnOadL59CE4FGoO+hIq69ZqbLBOUMsk2XRg= X-Received: by 2002:aca:2416:0:b0:38d:eb54:7ccf with SMTP id n22-20020aca2416000000b0038deb547ccfmr9158109oic.23.1684907513274; Tue, 23 May 2023 22:51:53 -0700 (PDT) Received: from free.home ([2804:7f1:2080:6383:46d9:ede8:ee97:8cc0]) by smtp.gmail.com with ESMTPSA id n11-20020a4ad40b000000b005255e556399sm4155329oos.43.2023.05.23.22.51.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 May 2023 22:51:53 -0700 (PDT) Received: from livre (livre.home [172.31.160.2]) by free.home (8.15.2/8.15.2) with ESMTPS id 34O5phhR3582434 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NOT); Wed, 24 May 2023 02:51:43 -0300 To: gcc-patches@gcc.gnu.org Cc: Rainer Orth , Mike Stump , David Edelsohn , Segher Boessenkool , Kewen Lin Subject: [PATCH] [testsuite] [powerpc] adjust -m32 counts for fold-vec-extract* Organization: Free thinker, does not speak for AdaCore Date: Wed, 24 May 2023 02:51:43 -0300 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/27.1 (gnu/linux) MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 X-Spam-Status: No, score=-12.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Alexandre Oliva via Gcc-patches From: Alexandre Oliva Reply-To: Alexandre Oliva Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766753639780559501?= X-GMAIL-MSGID: =?utf-8?q?1766753639780559501?= Codegen changes caused add instruction count mismatches on ppc-*-linux-gnu and other 32-bit ppc targets. At some point the expected counts were adjusted for lp64, but ilp32 differences remained, and published test results confirm it. Bootstrapped on x86_64-linux-gnu. Also tested on ppc- and x86-vx7r2 with gcc-12. for gcc/testsuite/ChangeLog * gcc.target/powerpc/fold-vec-extract-char.p7.c: Adjust addi counts for ilp32. * gcc.target/powerpc/fold-vec-extract-double.p7.c: Likewise. * gcc.target/powerpc/fold-vec-extract-float.p7.c: Likewise. * gcc.target/powerpc/fold-vec-extract-float.p8.c: Likewise. * gcc.target/powerpc/fold-vec-extract-int.p7.c: Likewise. * gcc.target/powerpc/fold-vec-extract-int.p8.c: Likewise. * gcc.target/powerpc/fold-vec-extract-short.p7.c: Likewise. * gcc.target/powerpc/fold-vec-extract-short.p8.c: Likewise. --- .../gcc.target/powerpc/fold-vec-extract-char.p7.c | 3 ++- .../powerpc/fold-vec-extract-double.p7.c | 2 +- .../gcc.target/powerpc/fold-vec-extract-float.p7.c | 2 +- .../gcc.target/powerpc/fold-vec-extract-float.p8.c | 2 +- .../gcc.target/powerpc/fold-vec-extract-int.p7.c | 2 +- .../gcc.target/powerpc/fold-vec-extract-int.p8.c | 2 +- .../gcc.target/powerpc/fold-vec-extract-short.p7.c | 2 +- .../gcc.target/powerpc/fold-vec-extract-short.p8.c | 2 +- 8 files changed, 9 insertions(+), 8 deletions(-) diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c index 29a8aa84db282..c6647431d09c9 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c @@ -11,7 +11,8 @@ /* one extsb (extend sign-bit) instruction generated for each test against unsigned types */ -/* { dg-final { scan-assembler-times {\maddi\M} 9 } } */ +/* { dg-final { scan-assembler-times {\maddi\M} 9 { target { lp64 } } } } */ +/* { dg-final { scan-assembler-times {\maddi\M} 6 { target { ilp32 } } } } */ /* { dg-final { scan-assembler-times {\mli\M} 6 } } */ /* { dg-final { scan-assembler-times {\mstxvw4x\M|\mstvx\M|\mstxv\M} 6 } } */ /* -m32 target uses rlwinm in place of rldicl. */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c index 3cae644b90b71..db325efbb07ff 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c @@ -14,7 +14,7 @@ /* { dg-final { scan-assembler-times {\mli\M} 1 } } */ /* -m32 target has an 'add' in place of one of the 'addi'. */ /* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 { target lp64 } } } */ -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 3 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 { target ilp32 } } } */ /* -m32 target has a rlwinm in place of a rldic . */ /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 1 } } */ /* { dg-final { scan-assembler-times {\mstxvd2x\M} 1 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c index 59a4979457dcb..42ec69475fd07 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c @@ -13,7 +13,7 @@ /* { dg-final { scan-assembler-times {\mli\M} 1 } } */ /* -m32 as an add in place of an addi. */ /* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 { target lp64 } } } */ -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 3 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstvx\M|\mstxv\M} 1 } } */ /* -m32 uses rlwinm in place of rldic */ /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 1 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c index 4b1d75ee26d0f..68eeeede4b307 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c @@ -26,7 +26,7 @@ /* { dg-final { scan-assembler-times {\mstxvd2x\M} 1 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\madd\M} 1 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mlfs\M} 1 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times {\maddi\M} 2 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\maddi\M} 1 { target ilp32 } } } */ #include diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c index 3729a1646e9c9..e8130693ee953 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c @@ -11,7 +11,7 @@ /* { dg-final { scan-assembler-times {\mli\M} 6 } } */ /* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 9 { target lp64 } } } */ -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 12 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 9 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mstxvw4x\M|\mstvx\M|\mstxv\M} 6 } } */ /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 3 } } */ /* { dg-final { scan-assembler-times {\mlwz\M|\mlwa\M|\mlwzx\M|\mlwax\M} 6 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c index 75eaf25943b70..d1e3b62373f80 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c @@ -30,7 +30,7 @@ /* { dg-final { scan-assembler-times {\mstxvw4x\M} 6 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\madd\M} 3 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mlwz\M} 6 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times {\maddi\M} 9 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\maddi\M} 6 { target ilp32 } } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c index a495d9f3928fa..ec3b78bac5df6 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c @@ -11,7 +11,7 @@ /* { dg-final { scan-assembler-times {\mli\M} 6 } } */ /* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 9 { target lp64 } } } */ -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 12 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 9 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 3 } } */ /* { dg-final { scan-assembler-times {\mstxvw4x\M|\mstvx\M} 6 } } */ /* { dg-final { scan-assembler-times "lhz|lha|lhzx|lhax" 6 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c index 0ddecb4e4b55d..00685aca1367b 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c @@ -32,7 +32,7 @@ /* add and rlwinm instructions only on the variable tests. */ /* { dg-final { scan-assembler-times {\madd\M} 3 { target ilp32 } } } */ /* { dg-final { scan-assembler-times "rlwinm" 3 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times {\maddi\M} 9 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\maddi\M} 6 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mlha\M|\mlhz\M} 6 { target ilp32 } } } */