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[8.43.85.97]) by mx.google.com with ESMTPS id u3-20020a05622a198300b00403a7a5820fsi6651216qtc.142.2023.10.24.03.10.52 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Oct 2023 03:10:52 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 247643858C27 for ; Tue, 24 Oct 2023 10:10:52 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id A00073858CDB for ; Tue, 24 Oct 2023 10:10:28 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org A00073858CDB Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org A00073858CDB Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1698142230; cv=none; b=ZZ7e3/QMDJkznGHBqnYzKtWXZq347VIn0PLbdblnTUCg49R1oqdhMs4D+asyC0wXPZlws8m5Oao9xuBrAp6Xp48mb6uI68PKd31OHGeavnpZ/Ncp6h4r3+Yd5nvkBSnO2XMbs7Mw980DQUWs/GUCqTrg/4E42rgtESWURP5XLfo= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1698142230; c=relaxed/simple; bh=h+LB4n3Vrf+nzoQpS0Y9Ew7i4Tj8v+8Xz3O2Nbn45wk=; h=From:To:Subject:Date:Message-ID:MIME-Version; b=iBw3ziCc5IDzPCef8inJcvEw8SJyb9tCJgwv3IBisl9ESpHqIWK9JZR0whcv4WFUzx/DWRo4RHkK8gdQ+dQPNjPlda5rLjf9mEvrwUbGs4rbhZuMuVKGsa6Sytse/Us4sFujxXAMcHFoXzSIYWKOTv9YZtGQPS7QF7OBZ65mhIY= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5B5482F4; Tue, 24 Oct 2023 03:11:09 -0700 (PDT) Received: from localhost (e121540-lin.manchester.arm.com [10.32.110.72]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A96533F64C; Tue, 24 Oct 2023 03:10:27 -0700 (PDT) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, ubizjak@gmail.com, kirill.yukhin@gmail.com, hongtao.liu@intel.com, richard.sandiford@arm.com Cc: ubizjak@gmail.com, kirill.yukhin@gmail.com, hongtao.liu@intel.com Subject: [PATCH] i386: Fix undefined masks in vpopcnt tests Date: Tue, 24 Oct 2023 11:10:26 +0100 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 X-Spam-Status: No, score=-23.8 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1780631210316970541 X-GMAIL-MSGID: 1780631210316970541 The files changed in this patch had tests for masked and unmasked popcnt. However, the mask inputs to the masked forms were undefined, and would be set to zero by init_regs. Any combine-like pass that ran after init_regs could then fold the masked forms into the unmasked ones. I saw this while testing the late-combine pass on x86. Tested on x86_64-linux-gnu. OK to install? (I didn't think this counted as obvious because there are other ways of initialising the mask.) Richard gcc/testsuite/ * gcc.target/i386/avx512bitalg-vpopcntb.c: Use an asm to define the mask. * gcc.target/i386/avx512bitalg-vpopcntbvl.c: Likewise. * gcc.target/i386/avx512bitalg-vpopcntw.c: Likewise. * gcc.target/i386/avx512bitalg-vpopcntwvl.c: Likewise. * gcc.target/i386/avx512vpopcntdq-vpopcntd.c: Likewise. * gcc.target/i386/avx512vpopcntdq-vpopcntq.c: Likewise. --- gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntb.c | 1 + gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntbvl.c | 1 + gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntw.c | 1 + gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntwvl.c | 1 + gcc/testsuite/gcc.target/i386/avx512vpopcntdq-vpopcntd.c | 1 + gcc/testsuite/gcc.target/i386/avx512vpopcntdq-vpopcntq.c | 1 + 6 files changed, 6 insertions(+) diff --git a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntb.c b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntb.c index 44b82c0519d..c52088161a0 100644 --- a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntb.c +++ b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntb.c @@ -11,6 +11,7 @@ extern __m512i z, z1; int foo () { __mmask16 msk; + asm volatile ("" : "=k" (msk)); __m512i c = _mm512_popcnt_epi8 (z); asm volatile ("" : "+v" (c)); c = _mm512_mask_popcnt_epi8 (z1, msk, z); diff --git a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntbvl.c b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntbvl.c index 8c2dfaba9c6..7d11c6c4623 100644 --- a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntbvl.c +++ b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntbvl.c @@ -16,6 +16,7 @@ int foo () { __mmask32 msk32; __mmask16 msk16; + asm volatile ("" : "=k" (msk16), "=k" (msk32)); __m256i c256 = _mm256_popcnt_epi8 (y); asm volatile ("" : "+v" (c256)); c256 = _mm256_mask_popcnt_epi8 (y_1, msk32, y); diff --git a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntw.c b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntw.c index 2ef8589f6c1..bc470415e9b 100644 --- a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntw.c +++ b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntw.c @@ -11,6 +11,7 @@ extern __m512i z, z1; int foo () { __mmask16 msk; + asm volatile ("" : "=k" (msk)); __m512i c = _mm512_popcnt_epi16 (z); asm volatile ("" : "+v" (c)); c = _mm512_mask_popcnt_epi16 (z1, msk, z); diff --git a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntwvl.c b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntwvl.c index c976461b12e..3a6af3ed8a1 100644 --- a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntwvl.c +++ b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntwvl.c @@ -16,6 +16,7 @@ int foo () { __mmask16 msk16; __mmask8 msk8; + asm volatile ("" : "=k" (msk16), "=k" (msk8)); __m256i c256 = _mm256_popcnt_epi16 (y); asm volatile ("" : "+v" (c256)); c256 = _mm256_mask_popcnt_epi16 (y_1, msk16, y); diff --git a/gcc/testsuite/gcc.target/i386/avx512vpopcntdq-vpopcntd.c b/gcc/testsuite/gcc.target/i386/avx512vpopcntdq-vpopcntd.c index b4d82f97032..0a54ae83055 100644 --- a/gcc/testsuite/gcc.target/i386/avx512vpopcntdq-vpopcntd.c +++ b/gcc/testsuite/gcc.target/i386/avx512vpopcntdq-vpopcntd.c @@ -20,6 +20,7 @@ int foo () { __mmask16 msk; __mmask8 msk8; + asm volatile ("" : "=k" (msk), "=k" (msk8)); __m128i a = _mm_popcnt_epi32 (x); asm volatile ("" : "+v" (a)); a = _mm_mask_popcnt_epi32 (x_1, msk8, x); diff --git a/gcc/testsuite/gcc.target/i386/avx512vpopcntdq-vpopcntq.c b/gcc/testsuite/gcc.target/i386/avx512vpopcntdq-vpopcntq.c index e87d6c999b6..c11e6e00998 100644 --- a/gcc/testsuite/gcc.target/i386/avx512vpopcntdq-vpopcntq.c +++ b/gcc/testsuite/gcc.target/i386/avx512vpopcntdq-vpopcntq.c @@ -19,6 +19,7 @@ extern __m512i z, z_1; int foo () { __mmask8 msk; + asm volatile ("" : "=k" (msk)); __m128i a = _mm_popcnt_epi64 (x); asm volatile ("" : "+v" (a)); a = _mm_mask_popcnt_epi64 (x_1, msk, x);