From patchwork Thu Sep 29 10:41:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Sandiford X-Patchwork-Id: 1532 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f2ce:0:0:0:0:0 with SMTP id d14csp617378wrp; Thu, 29 Sep 2022 03:44:58 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4znWgcDADpiym3MHXPqmcsY5uv9oaln4F2dN30ziD0R0dszGDQZpze0F91eIYAVEvM5/Qb X-Received: by 2002:aa7:cc8e:0:b0:457:23db:f0cc with SMTP id p14-20020aa7cc8e000000b0045723dbf0ccmr2697311edt.122.1664448298811; Thu, 29 Sep 2022 03:44:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1664448298; cv=none; d=google.com; s=arc-20160816; b=MSS8I+4eQmWnvoq3FYI/TgOF9Ini7V/Bmqmv7tQFdfZv9J4cBfNkps1zvcNpB943G1 tTV72Yw6xcavoEzkBFgIQRYM3K1msAhLkdfOTkemy/lb70amDKQgfyrP+dAJ8gsAdDrC 2SFKNRgWEdRp8MWlv2aLfF6Gsd8ki7lUFpsVqAIjpp3wvjZsx00bVygaOTbHzVeq1sV2 rBrxZr4IFF9dFaOGYyfwE9x4oNAoB8J+voZlovq83+AQnlG2gcwsirib2O572f/0pGxT vuysRUlaMlIB8djJwRaFzoXJPaYmT75pE15/RgsFuHSNvJU0bUjkbCwBSBaOkgbv0BXe Dieg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:reply-to:from:list-subscribe:list-help:list-post :list-archive:list-unsubscribe:list-id:precedence:mime-version :user-agent:message-id:in-reply-to:date:references:subject :mail-followup-to:to:dmarc-filter:delivered-to:dkim-signature :dkim-filter; bh=0QfBI7nmwJjq7hXj6Z5kOI36yDjBx3seI5a5LhANl7o=; b=btI+m0RkHp02e2ndsNWDnTjRz/rSQSBbQh1ymJzlASN3LsOI4RwrIzVInAj+xi+vB4 PXGBWLCBzPi8H9KEeK97/7MQb2D+SZIFL1xBm9eWq1EFCD+c8acdLlCTSVDJXJfBjX4f ZcFdOtPla7s0t6WXiKajImWHgQIiDRcHQbTx7OmqvN7jJOPjGg1Lox4CGmi0x++t4E/e 20SKB/Ez5ZK6M3gklwpR9HJSbkiHkMRdIcwmqpwuhXIrhUP5sp9klKdfxIW+rRQNp0UR Cp9X3ynJOmKFcVKQhrQpIWZCBT+tFX/iN9UFJ2B4l87E4eCTKdkAbJgXQsfbPZlg1vJi wGiw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b="a8pYd/T4"; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id d31-20020a056402401f00b004520e27e5b9si5328736eda.626.2022.09.29.03.44.58 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Sep 2022 03:44:58 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b="a8pYd/T4"; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id EC08C385417D for ; Thu, 29 Sep 2022 10:42:40 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org EC08C385417D DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1664448161; bh=0QfBI7nmwJjq7hXj6Z5kOI36yDjBx3seI5a5LhANl7o=; h=To:Subject:References:Date:In-Reply-To:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=a8pYd/T4MefRfxDLp5Tpq/h6qGpgVDSwzr8IXBDHYjYikHffwlheZuSs6my3//m6R enf3QeF/7VmcWLzFaaCROxA1gmXnxoiO0RiGBQBLyD3M1fTb0iyGv1ZooA3lMFCBO4 AJnGI/yfvKtdmLw9eR/NTVwTOeGwJG61iMf/NfDo= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 5D9B23857B80 for ; Thu, 29 Sep 2022 10:41:20 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 5D9B23857B80 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C06AC15BF for ; Thu, 29 Sep 2022 03:41:26 -0700 (PDT) Received: from localhost (e121540-lin.manchester.arm.com [10.32.98.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BA7FF3F73B for ; Thu, 29 Sep 2022 03:41:19 -0700 (PDT) To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@arm.com Subject: [PATCH 09/17] aarch64: Reorder an entry in aarch64-option-extensions.def References: Date: Thu, 29 Sep 2022 11:41:18 +0100 In-Reply-To: (Richard Sandiford's message of "Thu, 29 Sep 2022 11:39:11 +0100") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 X-Spam-Status: No, score=-46.1 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Richard Sandiford via Gcc-patches From: Richard Sandiford Reply-To: Richard Sandiford Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1745300539158700199?= X-GMAIL-MSGID: =?utf-8?q?1745300539158700199?= aarch64-option-extensions.def was topologically sorted except for one case: crypto came before its aes and sha2 dependencies. This patch moves crypto after sha2 instead. gcc/ * config/aarch64/aarch64-option-extensions.def: Move crypto after sha2. gcc/testsuite/ * gcc.target/aarch64/cpunative/native_cpu_0.c: Expect +crypto to come after +crc. * gcc.target/aarch64/cpunative/native_cpu_13.c: Likewise. * gcc.target/aarch64/cpunative/native_cpu_16.c: Likewise. * gcc.target/aarch64/cpunative/native_cpu_17.c: Likewise. * gcc.target/aarch64/cpunative/native_cpu_6.c: Likewise. * gcc.target/aarch64/cpunative/native_cpu_7.c: Likewise. * gcc.target/aarch64/options_set_2.c: Likewise. * gcc.target/aarch64/options_set_3.c: Likewise. * gcc.target/aarch64/options_set_4.c: Likewise. --- .../aarch64/aarch64-option-extensions.def | 20 +++++++++---------- .../aarch64/cpunative/native_cpu_0.c | 2 +- .../aarch64/cpunative/native_cpu_13.c | 2 +- .../aarch64/cpunative/native_cpu_16.c | 2 +- .../aarch64/cpunative/native_cpu_17.c | 2 +- .../aarch64/cpunative/native_cpu_6.c | 2 +- .../aarch64/cpunative/native_cpu_7.c | 2 +- .../gcc.target/aarch64/options_set_2.c | 2 +- .../gcc.target/aarch64/options_set_3.c | 2 +- .../gcc.target/aarch64/options_set_4.c | 4 ++-- 10 files changed, 20 insertions(+), 20 deletions(-) diff --git a/gcc/config/aarch64/aarch64-option-extensions.def b/gcc/config/aarch64/aarch64-option-extensions.def index b9800812738..df2c8d19b8d 100644 --- a/gcc/config/aarch64/aarch64-option-extensions.def +++ b/gcc/config/aarch64/aarch64-option-extensions.def @@ -76,16 +76,6 @@ AARCH64_OPT_EXTENSION("simd", AARCH64_FL_SIMD, AARCH64_FL_FP, \ AARCH64_FL_I8MM | AARCH64_FL_F32MM | AARCH64_FL_F64MM, \ false, "asimd") -/* Enabling "crypto" also enables "fp", "simd", "aes" and "sha2". - Disabling "crypto" disables "crypto", "aes", "sha2", "sha3" and "sm3/sm4", - "sve2-aes", "sve2-sha3", "sve2-sm4". */ -AARCH64_OPT_EXTENSION("crypto", AARCH64_FL_CRYPTO, AARCH64_FL_FP | \ - AARCH64_FL_SIMD | AARCH64_FL_AES | AARCH64_FL_SHA2, \ - AARCH64_FL_AES | AARCH64_FL_SHA2 | AARCH64_FL_SHA3 | \ - AARCH64_FL_SM4 | AARCH64_FL_SVE2_AES | \ - AARCH64_FL_SVE2_SHA3 | AARCH64_FL_SVE2_SM4, true, \ - "aes pmull sha1 sha2") - /* Enabling or disabling "crc" only changes "crc". */ AARCH64_OPT_EXTENSION("crc", AARCH64_FL_CRC, 0, 0, false, "crc32") @@ -127,6 +117,16 @@ AARCH64_OPT_EXTENSION("sha2", AARCH64_FL_SHA2, AARCH64_FL_FPSIMD, \ AARCH64_FL_CRYPTO | AARCH64_FL_SHA3 | \ AARCH64_FL_SVE2_SHA3, false, "sha1 sha2") +/* Enabling "crypto" also enables "fp", "simd", "aes" and "sha2". + Disabling "crypto" disables "crypto", "aes", "sha2", "sha3" and "sm3/sm4", + "sve2-aes", "sve2-sha3", "sve2-sm4". */ +AARCH64_OPT_EXTENSION("crypto", AARCH64_FL_CRYPTO, AARCH64_FL_FP | \ + AARCH64_FL_SIMD | AARCH64_FL_AES | AARCH64_FL_SHA2, \ + AARCH64_FL_AES | AARCH64_FL_SHA2 | AARCH64_FL_SHA3 | \ + AARCH64_FL_SM4 | AARCH64_FL_SVE2_AES | \ + AARCH64_FL_SVE2_SHA3 | AARCH64_FL_SVE2_SM4, true, \ + "aes pmull sha1 sha2") + /* Enabling "sha3" enables "simd" and "sha2". Disabling "sha3" disables "sha3" and "sve2-sha3". */ AARCH64_OPT_EXTENSION("sha3", AARCH64_FL_SHA3, AARCH64_FL_FPSIMD | \ diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_0.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_0.c index f155f51bae7..8499f87c39b 100644 --- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_0.c +++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_0.c @@ -7,6 +7,6 @@ int main() return 0; } -/* { dg-final { scan-assembler {\.arch armv8-a\+crypto\+crc\+dotprod} } } */ +/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto} } } */ /* Test a normal looking procinfo. */ diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_13.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_13.c index b7b3a8e13df..551669091c7 100644 --- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_13.c +++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_13.c @@ -7,6 +7,6 @@ int main() return 0; } -/* { dg-final { scan-assembler {\.arch armv8-a\+crypto\+crc\+dotprod} } } */ +/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto} } } */ /* Test one with mixed order of feature bits. */ diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c index a424e7c56c7..2f963bb2312 100644 --- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c +++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c @@ -7,6 +7,6 @@ int main() return 0; } -/* { dg-final { scan-assembler {\.arch armv8-a\+crypto\+crc\+dotprod\+sve2} } } */ +/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto\+sve2} } } */ /* Test a normal looking procinfo. */ diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c index c269c5fef7f..c68a697aa3e 100644 --- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c +++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c @@ -7,6 +7,6 @@ int main() return 0; } -/* { dg-final { scan-assembler {\.arch armv8-a\+crypto\+crc\+dotprod\+sve2} } } */ +/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto\+sve2} } } */ /* Test a normal looking procinfo. */ diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_6.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_6.c index da72052e623..7608e8845a6 100644 --- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_6.c +++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_6.c @@ -7,7 +7,7 @@ int main() return 0; } -/* { dg-final { scan-assembler {\.arch armv8-a\+crypto\+fp16} } } */ +/* { dg-final { scan-assembler {\.arch armv8-a\+fp16\+crypto} } } */ /* Test one where the feature bits for crypto and fp16 are given in same order as declared in options file. */ diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_7.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_7.c index 96ad4c14db1..72b14b4f6ed 100644 --- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_7.c +++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_7.c @@ -7,7 +7,7 @@ int main() return 0; } -/* { dg-final { scan-assembler {\.arch armv8-a\+crypto\+fp16} } } */ +/* { dg-final { scan-assembler {\.arch armv8-a\+fp16\+crypto} } } */ /* Test one where the crypto and fp16 options are specified in different order from what is in the options file. */ diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_2.c b/gcc/testsuite/gcc.target/aarch64/options_set_2.c index 3476febce70..f82cb5f7823 100644 --- a/gcc/testsuite/gcc.target/aarch64/options_set_2.c +++ b/gcc/testsuite/gcc.target/aarch64/options_set_2.c @@ -6,6 +6,6 @@ int main () return 0; } -/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crypto\+crc} 1 } } */ +/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+crypto} 1 } } */ /* Check to see if crc and crypto are maintained if crypto specified. */ diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_3.c b/gcc/testsuite/gcc.target/aarch64/options_set_3.c index 4558339f16c..7d350cfa361 100644 --- a/gcc/testsuite/gcc.target/aarch64/options_set_3.c +++ b/gcc/testsuite/gcc.target/aarch64/options_set_3.c @@ -6,6 +6,6 @@ int main () return 0; } -/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crypto\+crc} 1 } } */ +/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+crypto} 1 } } */ /* Check if smallest set is maintained when outputting. */ diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_4.c b/gcc/testsuite/gcc.target/aarch64/options_set_4.c index 15514bfe93e..5370e02e153 100644 --- a/gcc/testsuite/gcc.target/aarch64/options_set_4.c +++ b/gcc/testsuite/gcc.target/aarch64/options_set_4.c @@ -6,7 +6,7 @@ int main () return 0; } -/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crypto\+crc} 1 } } */ +/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+crypto} 1 } } */ /* Check if individual bits that make up a grouping is specified that only the - grouping is kept. */ \ No newline at end of file + grouping is kept. */