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[46.5.130.86]) by smtp.gmail.com with ESMTPSA id m16-20020a5d6250000000b003068f5cca8csm8108219wrv.94.2023.06.26.11.59.10 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 26 Jun 2023 11:59:11 -0700 (PDT) Message-ID: Date: Mon, 26 Jun 2023 20:59:10 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.12.0 Cc: rdapp.gcc@gmail.com Content-Language: en-US Subject: [PATCH] RISC-V: Add autovect widening/narrowing Integer/FP conversions. To: gcc-patches , palmer , Kito Cheng , "juzhe.zhong@rivai.ai" , jeffreyalaw X-Spam-Status: No, score=-8.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_ASCII_DIVIDERS, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Robin Dapp via Gcc-patches From: Robin Dapp Reply-To: Robin Dapp Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769792935805839217?= X-GMAIL-MSGID: =?utf-8?q?1769792935805839217?= Hi, this patch implements widening and narrowing float-to-int and int-to-float autovec conversions and adds tests. Regards Robin gcc/ChangeLog: * config/riscv/autovec.md (2): New expander. (2): Dito. (2): Dito. (2): Dito. * config/riscv/vector-iterators.md: Add vnconvert. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c: New test. * gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c: New test. * gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c: New test. * gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h: New test. * gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-zvfh-run.c: New test. * gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-run.c: New test. * gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c: New test. * gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c: New test. * gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h: New test. * gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c: New test. * gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-run.c: New test. * gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c: New test. * gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c: New test. * gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h: New test. * gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c: New test. * gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c: New test. * gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c: New test. * gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c: New test. * gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h: New test. * gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c: New test. --- gcc/config/riscv/autovec.md | 76 +++++++++++++++ gcc/config/riscv/vector-iterators.md | 8 ++ .../rvv/autovec/conversions/vfncvt-ftoi-run.c | 96 +++++++++++++++++++ .../autovec/conversions/vfncvt-ftoi-rv32gcv.c | 7 ++ .../autovec/conversions/vfncvt-ftoi-rv64gcv.c | 7 ++ .../conversions/vfncvt-ftoi-template.h | 19 ++++ .../conversions/vfncvt-ftoi-zvfh-run.c | 42 ++++++++ .../rvv/autovec/conversions/vfncvt-itof-run.c | 52 ++++++++++ .../autovec/conversions/vfncvt-itof-rv32gcv.c | 7 ++ .../autovec/conversions/vfncvt-itof-rv64gcv.c | 7 ++ .../conversions/vfncvt-itof-template.h | 18 ++++ .../conversions/vfncvt-itof-zvfh-run.c | 64 +++++++++++++ .../rvv/autovec/conversions/vfwcvt-ftoi-run.c | 64 +++++++++++++ .../autovec/conversions/vfwcvt-ftoi-rv32gcv.c | 7 ++ .../autovec/conversions/vfwcvt-ftoi-rv64gcv.c | 7 ++ .../conversions/vfwcvt-ftoi-template.h | 17 ++++ .../conversions/vfwcvt-ftoi-zvfh-run.c | 64 +++++++++++++ .../rvv/autovec/conversions/vfwcvt-itof-run.c | 96 +++++++++++++++++++ .../autovec/conversions/vfwcvt-itof-rv32gcv.c | 7 ++ .../autovec/conversions/vfwcvt-itof-rv64gcv.c | 7 ++ .../conversions/vfwcvt-itof-template.h | 20 ++++ .../conversions/vfwcvt-itof-zvfh-run.c | 45 +++++++++ 22 files changed, 737 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-zvfh-run.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-run.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-run.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c diff --git a/gcc/config/riscv/autovec.md b/gcc/config/riscv/autovec.md index c2913128362..ba75c986b20 100644 --- a/gcc/config/riscv/autovec.md +++ b/gcc/config/riscv/autovec.md @@ -592,6 +592,82 @@ (define_expand "2" DONE; }) +;; ========================================================================= +;; == Widening/narrowing Conversions +;; ========================================================================= + +;; ------------------------------------------------------------------------- +;; ---- [INT<-FP] Widening Conversions +;; ------------------------------------------------------------------------- +;; Includes: +;; - vfwcvt.rtz.xu.f.v +;; - vfwcvt.rtz.x.f.v +;; ------------------------------------------------------------------------- +(define_expand "2" + [(set (match_operand:VWCONVERTI 0 "register_operand") + (any_fix:VWCONVERTI + (match_operand: 1 "register_operand")))] + "TARGET_VECTOR" +{ + insn_code icode = code_for_pred_widen (, mode); + riscv_vector::emit_vlmax_insn (icode, riscv_vector::RVV_UNOP, operands); + DONE; +}) + +;; ------------------------------------------------------------------------- +;; ---- [FP<-INT] Widening Conversions +;; ------------------------------------------------------------------------- +;; Includes: +;; - vfwcvt.f.xu.v +;; - vfwcvt.f.x.v +;; ------------------------------------------------------------------------- +(define_expand "2" + [(set (match_operand:VF 0 "register_operand") + (any_float:VF + (match_operand: 1 "register_operand")))] + "TARGET_VECTOR" +{ + insn_code icode = code_for_pred_widen (, mode); + riscv_vector::emit_vlmax_insn (icode, riscv_vector::RVV_UNOP, operands); + DONE; +}) + +;; ------------------------------------------------------------------------- +;; ---- [INT<-FP] Narrowing Conversions +;; ------------------------------------------------------------------------- +;; Includes: +;; - vfncvt.rtz.xu.f.v +;; - vfncvt.rtz.x.f.v +;; ------------------------------------------------------------------------- +(define_expand "2" + [(set (match_operand: 0 "register_operand") + (any_fix: + (match_operand:VF 1 "register_operand")))] + "TARGET_VECTOR" +{ + insn_code icode = code_for_pred_narrow (, mode); + riscv_vector::emit_vlmax_insn (icode, riscv_vector::RVV_UNOP, operands); + DONE; +}) + +;; ------------------------------------------------------------------------- +;; ---- [FP<-INT] Narrowing Conversions +;; ------------------------------------------------------------------------- +;; Includes: +;; - vfncvt.f.xu.w +;; - vfncvt.f.x.w +;; ------------------------------------------------------------------------- +(define_expand "2" + [(set (match_operand: 0 "register_operand") + (any_float: + (match_operand:VWCONVERTI 1 "register_operand")))] + "TARGET_VECTOR" +{ + insn_code icode = code_for_pred_narrow (, mode); + riscv_vector::emit_vlmax_fp_insn (icode, riscv_vector::RVV_UNOP, operands); + DONE; +}) + ;; ========================================================================= ;; == Unary arithmetic ;; ========================================================================= diff --git a/gcc/config/riscv/vector-iterators.md b/gcc/config/riscv/vector-iterators.md index 573a1884e66..dcc51c60f07 100644 --- a/gcc/config/riscv/vector-iterators.md +++ b/gcc/config/riscv/vector-iterators.md @@ -1450,6 +1450,14 @@ (define_mode_attr VNCONVERT [ (VNx1DF "VNx1SI") (VNx2DF "VNx2SI") (VNx4DF "VNx4SI") (VNx8DF "VNx8SI") (VNx16DF "VNx16SI") ]) +(define_mode_attr vnconvert [ + (VNx1HF "vnx1qi") (VNx2HF "vnx2qi") (VNx4HF "vnx4qi") (VNx8HF "vnx8qi") (VNx16HF "vnx16qi") (VNx32HF "vnx32qi") (VNx64HF "vnx64qi") + (VNx1SF "vnx1hi") (VNx2SF "vnx2hi") (VNx4SF "vnx4hi") (VNx8SF "vnx8hi") (VNx16SF "vnx16hi") (VNx32SF "vnx32hi") + (VNx1SI "vnx1hf") (VNx2SI "vnx2hf") (VNx4SI "vnx4hf") (VNx8SI "vnx8hf") (VNx16SI "vnx16hf") (VNx32SI "vnx32hf") + (VNx1DI "vnx1sf") (VNx2DI "vnx2sf") (VNx4DI "vnx4sf") (VNx8DI "vnx8sf") (VNx16DI "vnx16sf") + (VNx1DF "vnx1si") (VNx2DF "vnx2si") (VNx4DF "vnx4si") (VNx8DF "vnx8si") (VNx16DF "vnx16si") +]) + (define_mode_attr VDEMOTE [ (VNx1DI "VNx2SI") (VNx2DI "VNx4SI") (VNx4DI "VNx8SI") (VNx8DI "VNx16SI") (VNx16DI "VNx32SI") diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c new file mode 100644 index 00000000000..ce3fcfa9af8 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c @@ -0,0 +1,96 @@ +/* { dg-do run { target { riscv_vector } } } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */ + +#include "vfncvt-ftoi-template.h" + +#define RUN(TYPE1, TYPE2, NUM) \ + TYPE1 src##TYPE1##TYPE2##NUM[NUM]; \ + TYPE2 dst##TYPE1##TYPE2##NUM[NUM]; \ + for (int i = 0; i < NUM; i++) \ + { \ + src##TYPE1##TYPE2##NUM[i] = i * -3.1315926 - 92.947289; \ + } \ + vfncvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \ + for (int i = 0; i < NUM; i++) \ + if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i]) \ + __builtin_abort (); + +#define RUN2(TYPE1, TYPE2, NUM) \ + TYPE1 src##TYPE1##TYPE2##NUM[NUM]; \ + TYPE2 dst##TYPE1##TYPE2##NUM[NUM]; \ + for (int i = 0; i < NUM; i++) \ + { \ + src##TYPE1##TYPE2##NUM[i] = i * 3.1315926 + 92.947289; \ + } \ + vfncvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \ + for (int i = 0; i < NUM; i++) \ + if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i]) \ + __builtin_abort (); + +int +main () +{ + RUN (float, int16_t, 3) + RUN (float, int16_t, 4) + RUN (float, int16_t, 7) + RUN (float, int16_t, 99) + RUN (float, int16_t, 119) + RUN (float, int16_t, 128) + RUN (float, int16_t, 256) + RUN (float, int16_t, 279) + RUN (float, int16_t, 555) + RUN (float, int16_t, 1024) + RUN (float, int16_t, 1389) + RUN (float, int16_t, 2048) + RUN (float, int16_t, 3989) + RUN (float, int16_t, 4096) + RUN (float, int16_t, 5975) + + RUN2 (float, uint16_t, 3) + RUN2 (float, uint16_t, 4) + RUN2 (float, uint16_t, 7) + RUN2 (float, uint16_t, 99) + RUN2 (float, uint16_t, 119) + RUN2 (float, uint16_t, 128) + RUN2 (float, uint16_t, 256) + RUN2 (float, uint16_t, 279) + RUN2 (float, uint16_t, 555) + RUN2 (float, uint16_t, 1024) + RUN2 (float, uint16_t, 1389) + RUN2 (float, uint16_t, 2048) + RUN2 (float, uint16_t, 3989) + RUN2 (float, uint16_t, 4096) + RUN2 (float, uint16_t, 5975) + + RUN (double, int32_t, 3) + RUN (double, int32_t, 4) + RUN (double, int32_t, 7) + RUN (double, int32_t, 99) + RUN (double, int32_t, 119) + RUN (double, int32_t, 128) + RUN (double, int32_t, 256) + RUN (double, int32_t, 279) + RUN (double, int32_t, 555) + RUN (double, int32_t, 1024) + RUN (double, int32_t, 1389) + RUN (double, int32_t, 2048) + RUN (double, int32_t, 3989) + RUN (double, int32_t, 4096) + RUN (double, int32_t, 5975) + + RUN2 (double, uint32_t, 3) + RUN2 (double, uint32_t, 4) + RUN2 (double, uint32_t, 7) + RUN2 (double, uint32_t, 99) + RUN2 (double, uint32_t, 119) + RUN2 (double, uint32_t, 128) + RUN2 (double, uint32_t, 256) + RUN2 (double, uint32_t, 279) + RUN2 (double, uint32_t, 555) + RUN2 (double, uint32_t, 1024) + RUN2 (double, uint32_t, 1389) + RUN2 (double, uint32_t, 2048) + RUN2 (double, uint32_t, 3989) + RUN2 (double, uint32_t, 4096) + RUN2 (double, uint32_t, 5975) +} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c new file mode 100644 index 00000000000..4bed5eb7fff --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv32gcv_zvfh -mabi=ilp32d --param=riscv-autovec-preference=scalable" } */ + +#include "vfncvt-ftoi-template.h" + +/* { dg-final { scan-assembler-times {\tvfncvt\.rtz\.x\.f\.w} 3 } } */ +/* { dg-final { scan-assembler-times {\tvfncvt\.rtz\.xu\.f\.w} 3 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c new file mode 100644 index 00000000000..7efc3f31c26 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv_zvfh -mabi=lp64d --param=riscv-autovec-preference=scalable" } */ + +#include "vfncvt-ftoi-template.h" + +/* { dg-final { scan-assembler-times {\tvfncvt\.rtz\.x\.f\.w} 3 } } */ +/* { dg-final { scan-assembler-times {\tvfncvt\.rtz\.xu\.f\.w} 3 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h new file mode 100644 index 00000000000..e5649843017 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h @@ -0,0 +1,19 @@ +#include + +#define TEST(TYPE1, TYPE2) \ + __attribute__ ((noipa)) void vfncvt_##TYPE1##TYPE2 (TYPE2 *dst, TYPE1 *a, \ + int n) \ + { \ + for (int i = 0; i < n; i++) \ + dst[i] = (TYPE1) a[i]; \ + } + +#define TEST_ALL() \ + TEST (double, int32_t) \ + TEST (double, uint32_t) \ + TEST (float, int16_t) \ + TEST (float, uint16_t) \ + TEST (_Float16, int8_t) \ + TEST (_Float16, uint8_t) \ + +TEST_ALL () diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-zvfh-run.c new file mode 100644 index 00000000000..9771562d7d0 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-zvfh-run.c @@ -0,0 +1,42 @@ +/* { dg-do run { target { riscv_vector && riscv_zvfh_hw } } } */ +/* { dg-additional-options "-std=c99 -march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */ + +#include "vfncvt-ftoi-template.h" + +#define RUN(TYPE1, TYPE2, NUM) \ + TYPE1 src##TYPE1##TYPE2##NUM[NUM]; \ + TYPE2 dst##TYPE1##TYPE2##NUM[NUM]; \ + for (int i = 0; i < NUM; i++) \ + { \ + src##TYPE1##TYPE2##NUM[i] = i * -3.1315926 - 8.947289; \ + } \ + vfcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \ + for (int i = 0; i < NUM; i++) \ + if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i]) \ + __builtin_abort (); + +#define RUN2(TYPE1, TYPE2, NUM) \ + TYPE1 src##TYPE1##TYPE2##NUM[NUM]; \ + TYPE2 dst##TYPE1##TYPE2##NUM[NUM]; \ + for (int i = 0; i < NUM; i++) \ + { \ + src##TYPE1##TYPE2##NUM[i] = i * 3.1315926 + 8.947289; \ + } \ + vfcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \ + for (int i = 0; i < NUM; i++) \ + if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i]) \ + __builtin_abort (); + +int +main () +{ + RUN (_Float16, int8_t, 3) + RUN (_Float16, int8_t, 4) + RUN (_Float16, int8_t, 13) + RUN (_Float16, int8_t, 40) + + RUN2 (_Float16, uint8_t, 1) + RUN2 (_Float16, uint8_t, 8) + RUN2 (_Float16, uint8_t, 21) + RUN2 (_Float16, uint8_t, 33) +} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-run.c new file mode 100644 index 00000000000..9f3db6c1e5f --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-run.c @@ -0,0 +1,52 @@ +/* { dg-do run { target { riscv_vector } } } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */ + +#include "vfncvt-itof-template.h" + +#define RUN(TYPE1, TYPE2, NUM) \ + TYPE1 src##TYPE1##TYPE2##NUM[NUM]; \ + TYPE2 dst##TYPE1##TYPE2##NUM[NUM]; \ + for (int i = 0; i < NUM; i++) \ + { \ + src##TYPE1##TYPE2##NUM[i] = i * 3 + 88932; \ + } \ + vfncvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \ + for (int i = 0; i < NUM; i++) \ + if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i]) \ + __builtin_abort (); + +int +main () +{ + RUN (int64_t, float, 3) + RUN (int64_t, float, 4) + RUN (int64_t, float, 7) + RUN (int64_t, float, 99) + RUN (int64_t, float, 119) + RUN (int64_t, float, 128) + RUN (int64_t, float, 256) + RUN (int64_t, float, 279) + RUN (int64_t, float, 555) + RUN (int64_t, float, 1024) + RUN (int64_t, float, 1389) + RUN (int64_t, float, 2048) + RUN (int64_t, float, 3989) + RUN (int64_t, float, 4096) + RUN (int64_t, float, 5975) + + RUN (uint64_t, float, 3) + RUN (uint64_t, float, 4) + RUN (uint64_t, float, 7) + RUN (uint64_t, float, 99) + RUN (uint64_t, float, 119) + RUN (uint64_t, float, 128) + RUN (uint64_t, float, 256) + RUN (uint64_t, float, 279) + RUN (uint64_t, float, 555) + RUN (uint64_t, float, 1024) + RUN (uint64_t, float, 1389) + RUN (uint64_t, float, 2048) + RUN (uint64_t, float, 3989) + RUN (uint64_t, float, 4096) + RUN (uint64_t, float, 5975) +} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c new file mode 100644 index 00000000000..dd5b95c903d --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv32gcv_zvfh -mabi=ilp32d --param=riscv-autovec-preference=scalable" } */ + +#include "vfncvt-itof-template.h" + +/* { dg-final { scan-assembler-times {\tvfncvt\.f\.x\.w} 2 } } */ +/* { dg-final { scan-assembler-times {\tvfncvt\.f\.xu\.w} 2 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c new file mode 100644 index 00000000000..b3bdeced81d --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv_zvfh -mabi=lp64d --param=riscv-autovec-preference=scalable" } */ + +#include "vfncvt-itof-template.h" + +/* { dg-final { scan-assembler-times {\tvfncvt\.f\.x\.w} 2 } } */ +/* { dg-final { scan-assembler-times {\tvfncvt\.f\.xu\.w} 2 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h new file mode 100644 index 00000000000..6ef5f0d5e76 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h @@ -0,0 +1,18 @@ +#include + +#define TEST(TYPE1, TYPE2) \ + __attribute__ ((noipa)) \ + void vfncvt_##TYPE1##TYPE2 (TYPE2 *restrict dst, \ + TYPE1 *restrict a, int n) \ + { \ + for (int i = 0; i < n; i++) \ + dst[i] = (TYPE1) a[i]; \ + } + +#define TEST_ALL() \ + TEST (int64_t, float) \ + TEST (uint64_t, float) \ + TEST (int32_t, _Float16) \ + TEST (uint32_t, _Float16) \ + +TEST_ALL () diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c new file mode 100644 index 00000000000..b4e59c65ac7 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c @@ -0,0 +1,64 @@ +/* { dg-do run { target { riscv_vector && riscv_zvfh_hw } } } */ +/* { dg-additional-options "-std=c99 -march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */ + +#include "vfncvt-itof-template.h" + +#define RUN(TYPE1, TYPE2, NUM) \ + TYPE1 src##TYPE1##TYPE2##NUM[NUM]; \ + TYPE2 dst##TYPE1##TYPE2##NUM[NUM]; \ + for (int i = 0; i < NUM; i++) \ + { \ + src##TYPE1##TYPE2##NUM[i] = i * -3 - 832; \ + } \ + vfncvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \ + for (int i = 0; i < NUM; i++) \ + if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i]) \ + __builtin_abort (); + +#define RUN2(TYPE1, TYPE2, NUM) \ + TYPE1 src##TYPE1##TYPE2##NUM[NUM]; \ + TYPE2 dst##TYPE1##TYPE2##NUM[NUM]; \ + for (int i = 0; i < NUM; i++) \ + { \ + src##TYPE1##TYPE2##NUM[i] = i * 3 + 892; \ + } \ + vfncvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \ + for (int i = 0; i < NUM; i++) \ + if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i]) \ + __builtin_abort (); + +int +main () +{ + RUN (int32_t, _Float16, 3) + RUN (int32_t, _Float16, 4) + RUN (int32_t, _Float16, 7) + RUN (int32_t, _Float16, 99) + RUN (int32_t, _Float16, 119) + RUN (int32_t, _Float16, 128) + RUN (int32_t, _Float16, 256) + RUN (int32_t, _Float16, 279) + RUN (int32_t, _Float16, 555) + RUN (int32_t, _Float16, 1024) + RUN (int32_t, _Float16, 1389) + RUN (int32_t, _Float16, 2048) + RUN (int32_t, _Float16, 3989) + RUN (int32_t, _Float16, 4096) + RUN (int32_t, _Float16, 5975) + + RUN2 (uint32_t, _Float16, 3) + RUN2 (uint32_t, _Float16, 4) + RUN2 (uint32_t, _Float16, 7) + RUN2 (uint32_t, _Float16, 99) + RUN2 (uint32_t, _Float16, 119) + RUN2 (uint32_t, _Float16, 128) + RUN2 (uint32_t, _Float16, 256) + RUN2 (uint32_t, _Float16, 279) + RUN2 (uint32_t, _Float16, 555) + RUN2 (uint32_t, _Float16, 1024) + RUN2 (uint32_t, _Float16, 1389) + RUN2 (uint32_t, _Float16, 2048) + RUN2 (uint32_t, _Float16, 3989) + RUN2 (uint32_t, _Float16, 4096) + RUN2 (uint32_t, _Float16, 5975) +} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-run.c new file mode 100644 index 00000000000..928e0b39170 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-run.c @@ -0,0 +1,64 @@ +/* { dg-do run { target { riscv_vector } } } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */ + +#include "vfwcvt-ftoi-template.h" + +#define RUN(TYPE1, TYPE2, NUM) \ + TYPE1 src##TYPE1##TYPE2##NUM[NUM]; \ + TYPE2 dst##TYPE1##TYPE2##NUM[NUM]; \ + for (int i = 0; i < NUM; i++) \ + { \ + src##TYPE1##TYPE2##NUM[i] = i * -3.1315926 - 932.947289; \ + } \ + vfwcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \ + for (int i = 0; i < NUM; i++) \ + if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i]) \ + __builtin_abort (); + +#define RUN2(TYPE1, TYPE2, NUM) \ + TYPE1 src##TYPE1##TYPE2##NUM[NUM]; \ + TYPE2 dst##TYPE1##TYPE2##NUM[NUM]; \ + for (int i = 0; i < NUM; i++) \ + { \ + src##TYPE1##TYPE2##NUM[i] = i * 3.1315926 + 932.947289; \ + } \ + vfwcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \ + for (int i = 0; i < NUM; i++) \ + if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i]) \ + __builtin_abort (); + +int +main () +{ + RUN (float, int64_t, 3) + RUN (float, int64_t, 4) + RUN (float, int64_t, 7) + RUN (float, int64_t, 99) + RUN (float, int64_t, 119) + RUN (float, int64_t, 128) + RUN (float, int64_t, 256) + RUN (float, int64_t, 279) + RUN (float, int64_t, 555) + RUN (float, int64_t, 1024) + RUN (float, int64_t, 1389) + RUN (float, int64_t, 2048) + RUN (float, int64_t, 3989) + RUN (float, int64_t, 4096) + RUN (float, int64_t, 5975) + + RUN2 (float, uint64_t, 3) + RUN2 (float, uint64_t, 4) + RUN2 (float, uint64_t, 7) + RUN2 (float, uint64_t, 99) + RUN2 (float, uint64_t, 119) + RUN2 (float, uint64_t, 128) + RUN2 (float, uint64_t, 256) + RUN2 (float, uint64_t, 279) + RUN2 (float, uint64_t, 555) + RUN2 (float, uint64_t, 1024) + RUN2 (float, uint64_t, 1389) + RUN2 (float, uint64_t, 2048) + RUN2 (float, uint64_t, 3989) + RUN2 (float, uint64_t, 4096) + RUN2 (float, uint64_t, 5975) +} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c new file mode 100644 index 00000000000..ce2bea48067 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv32gcv_zvfh -mabi=ilp32d --param=riscv-autovec-preference=scalable" } */ + +#include "vfwcvt-ftoi-template.h" + +/* { dg-final { scan-assembler-times {\tvfwcvt\.rtz\.x\.f\.v} 2 } } */ +/* { dg-final { scan-assembler-times {\tvfwcvt\.rtz\.xu\.f\.v} 2 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c new file mode 100644 index 00000000000..99aa3de4281 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv_zvfh -mabi=lp64d --param=riscv-autovec-preference=scalable" } */ + +#include "vfwcvt-ftoi-template.h" + +/* { dg-final { scan-assembler-times {\tvfwcvt\.rtz\.x\.f\.v} 2 } } */ +/* { dg-final { scan-assembler-times {\tvfwcvt\.rtz\.xu\.f\.v} 2 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h new file mode 100644 index 00000000000..44702c754a6 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h @@ -0,0 +1,17 @@ +#include + +#define TEST(TYPE1, TYPE2) \ + __attribute__ ((noipa)) void vfwcvt_##TYPE1##TYPE2 (TYPE2 *dst, TYPE1 *a, \ + int n) \ + { \ + for (int i = 0; i < n; i++) \ + dst[i] = (TYPE1) a[i]; \ + } + +#define TEST_ALL() \ + TEST (_Float16, int32_t) \ + TEST (_Float16, uint32_t) \ + TEST (float, int64_t) \ + TEST (float, uint64_t) \ + +TEST_ALL () diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c new file mode 100644 index 00000000000..15bcd05b592 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c @@ -0,0 +1,64 @@ +/* { dg-do run { target { riscv_vector && riscv_zvfh_hw } } } */ +/* { dg-additional-options "-std=c99 -march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */ + +#include "vfcvt_rtz-template.h" + +#define RUN(TYPE1, TYPE2, NUM) \ + TYPE1 src##TYPE1##TYPE2##NUM[NUM]; \ + TYPE2 dst##TYPE1##TYPE2##NUM[NUM]; \ + for (int i = 0; i < NUM; i++) \ + { \ + src##TYPE1##TYPE2##NUM[i] = i * -3.1315926 - 832.947289; \ + } \ + vfcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \ + for (int i = 0; i < NUM; i++) \ + if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i]) \ + __builtin_abort (); + +#define RUN2(TYPE1, TYPE2, NUM) \ + TYPE1 src##TYPE1##TYPE2##NUM[NUM]; \ + TYPE2 dst##TYPE1##TYPE2##NUM[NUM]; \ + for (int i = 0; i < NUM; i++) \ + { \ + src##TYPE1##TYPE2##NUM[i] = i * 3.1315926 + 832.947289; \ + } \ + vfcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \ + for (int i = 0; i < NUM; i++) \ + if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i]) \ + __builtin_abort (); + +int +main () +{ + RUN (_Float16, int32_t, 3) + RUN (_Float16, int32_t, 4) + RUN (_Float16, int32_t, 7) + RUN (_Float16, int32_t, 99) + RUN (_Float16, int32_t, 119) + RUN (_Float16, int32_t, 128) + RUN (_Float16, int32_t, 256) + RUN (_Float16, int32_t, 279) + RUN (_Float16, int32_t, 555) + RUN (_Float16, int32_t, 1024) + RUN (_Float16, int32_t, 1389) + RUN (_Float16, int32_t, 2048) + RUN (_Float16, int32_t, 3989) + RUN (_Float16, int32_t, 4096) + RUN (_Float16, int32_t, 5975) + + RUN2 (_Float16, uint32_t, 3) + RUN2 (_Float16, uint32_t, 4) + RUN2 (_Float16, uint32_t, 7) + RUN2 (_Float16, uint32_t, 99) + RUN2 (_Float16, uint32_t, 119) + RUN2 (_Float16, uint32_t, 128) + RUN2 (_Float16, uint32_t, 256) + RUN2 (_Float16, uint32_t, 279) + RUN2 (_Float16, uint32_t, 555) + RUN2 (_Float16, uint32_t, 1024) + RUN2 (_Float16, uint32_t, 1389) + RUN2 (_Float16, uint32_t, 2048) + RUN2 (_Float16, uint32_t, 3989) + RUN2 (_Float16, uint32_t, 4096) + RUN2 (_Float16, uint32_t, 5975) +} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c new file mode 100644 index 00000000000..b9287f69558 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c @@ -0,0 +1,96 @@ +/* { dg-do run { target { riscv_vector } } } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */ + +#include "vfwcvt-itof-template.h" + +#define RUN(TYPE1, TYPE2, NUM) \ + TYPE1 src##TYPE1##TYPE2##NUM[NUM]; \ + TYPE2 dst##TYPE1##TYPE2##NUM[NUM]; \ + for (int i = 0; i < NUM; i++) \ + { \ + src##TYPE1##TYPE2##NUM[i] = i * -3 - 88932; \ + } \ + vfwcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \ + for (int i = 0; i < NUM; i++) \ + if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i]) \ + __builtin_abort (); + +#define RUN2(TYPE1, TYPE2, NUM) \ + TYPE1 src##TYPE1##TYPE2##NUM[NUM]; \ + TYPE2 dst##TYPE1##TYPE2##NUM[NUM]; \ + for (int i = 0; i < NUM; i++) \ + { \ + src##TYPE1##TYPE2##NUM[i] = i * 3 + 88932; \ + } \ + vfwcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \ + for (int i = 0; i < NUM; i++) \ + if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i]) \ + __builtin_abort (); + +int +main () +{ + RUN (int16_t, float, 3) + RUN (int16_t, float, 4) + RUN (int16_t, float, 7) + RUN (int16_t, float, 99) + RUN (int16_t, float, 119) + RUN (int16_t, float, 128) + RUN (int16_t, float, 256) + RUN (int16_t, float, 279) + RUN (int16_t, float, 555) + RUN (int16_t, float, 1024) + RUN (int16_t, float, 1389) + RUN (int16_t, float, 2048) + RUN (int16_t, float, 3989) + RUN (int16_t, float, 4096) + RUN (int16_t, float, 5975) + + RUN2 (uint16_t, float, 3) + RUN2 (uint16_t, float, 4) + RUN2 (uint16_t, float, 7) + RUN2 (uint16_t, float, 99) + RUN2 (uint16_t, float, 119) + RUN2 (uint16_t, float, 128) + RUN2 (uint16_t, float, 256) + RUN2 (uint16_t, float, 279) + RUN2 (uint16_t, float, 555) + RUN2 (uint16_t, float, 1024) + RUN2 (uint16_t, float, 1389) + RUN2 (uint16_t, float, 2048) + RUN2 (uint16_t, float, 3989) + RUN2 (uint16_t, float, 4096) + RUN2 (uint16_t, float, 5975) + + RUN (int32_t, double, 3) + RUN (int32_t, double, 4) + RUN (int32_t, double, 7) + RUN (int32_t, double, 99) + RUN (int32_t, double, 119) + RUN (int32_t, double, 128) + RUN (int32_t, double, 256) + RUN (int32_t, double, 279) + RUN (int32_t, double, 555) + RUN (int32_t, double, 1024) + RUN (int32_t, double, 1389) + RUN (int32_t, double, 2048) + RUN (int32_t, double, 3989) + RUN (int32_t, double, 4096) + RUN (int32_t, double, 5975) + + RUN2 (uint32_t, double, 3) + RUN2 (uint32_t, double, 4) + RUN2 (uint32_t, double, 7) + RUN2 (uint32_t, double, 99) + RUN2 (uint32_t, double, 119) + RUN2 (uint32_t, double, 128) + RUN2 (uint32_t, double, 256) + RUN2 (uint32_t, double, 279) + RUN2 (uint32_t, double, 555) + RUN2 (uint32_t, double, 1024) + RUN2 (uint32_t, double, 1389) + RUN2 (uint32_t, double, 2048) + RUN2 (uint32_t, double, 3989) + RUN2 (uint32_t, double, 4096) + RUN2 (uint32_t, double, 5975) +} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c new file mode 100644 index 00000000000..898b9c17231 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv32gcv_zvfh -mabi=ilp32d --param=riscv-autovec-preference=scalable" } */ + +#include "vfwcvt-itof-template.h" + +/* { dg-final { scan-assembler-times {\tvfwcvt\.f\.x\.v} 3 } } */ +/* { dg-final { scan-assembler-times {\tvfwcvt\.f\.xu\.v} 3 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c new file mode 100644 index 00000000000..e177b63738c --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv_zvfh -mabi=lp64d --param=riscv-autovec-preference=scalable" } */ + +#include "vfwcvt-itof-template.h" + +/* { dg-final { scan-assembler-times {\tvfwcvt\.f\.x\.v} 3 } } */ +/* { dg-final { scan-assembler-times {\tvfwcvt\.f\.xu\.v} 3 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h new file mode 100644 index 00000000000..8dab5bfd93a --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h @@ -0,0 +1,20 @@ +#include + +#define TEST(TYPE1, TYPE2) \ + __attribute__ ((noipa)) \ + void vfwcvt_##TYPE1##TYPE2 (TYPE2 *restrict dst, \ + TYPE1 *restrict a, int n) \ + { \ + for (int i = 0; i < n; i++) \ + dst[i] = (TYPE1) a[i]; \ + } + +#define TEST_ALL() \ + TEST (int16_t, float) \ + TEST (uint16_t, float) \ + TEST (int32_t, double) \ + TEST (uint32_t, double) \ + TEST (int8_t, _Float16) \ + TEST (uint8_t, _Float16) \ + +TEST_ALL () diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c new file mode 100644 index 00000000000..f89dc46d65f --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c @@ -0,0 +1,45 @@ +/* { dg-do run { target { riscv_vector && riscv_zvfh_hw } } } */ +/* { dg-additional-options "-std=c99 -march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model --param=riscv-autovec-preference=scalable" } */ + +#include "vfwcvt-itof-template.h" + +#define RUN(TYPE1, TYPE2, NUM) \ + TYPE1 src##TYPE1##TYPE2##NUM[NUM]; \ + TYPE2 dst##TYPE1##TYPE2##NUM[NUM]; \ + for (int i = 0; i < NUM; i++) \ + { \ + src##TYPE1##TYPE2##NUM[i] = i * -3 - 8; \ + } \ + vfwcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \ + for (int i = 0; i < NUM; i++) \ + if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i]) \ + __builtin_abort (); + +#define RUN2(TYPE1, TYPE2, NUM) \ + TYPE1 src##TYPE1##TYPE2##NUM[NUM]; \ + TYPE2 dst##TYPE1##TYPE2##NUM[NUM]; \ + for (int i = 0; i < NUM; i++) \ + { \ + src##TYPE1##TYPE2##NUM[i] = i * 3 + 8; \ + } \ + vfwcvt_##TYPE1##TYPE2 (dst##TYPE1##TYPE2##NUM, src##TYPE1##TYPE2##NUM, NUM); \ + for (int i = 0; i < NUM; i++) \ + if (dst##TYPE1##TYPE2##NUM[i] != (TYPE2) src##TYPE1##TYPE2##NUM[i]) \ + __builtin_abort (); + +int +main () +{ + RUN (int8_t, _Float16, 3) + RUN (int8_t, _Float16, 4) + RUN (int8_t, _Float16, 7) + RUN (int8_t, _Float16, 12) + RUN (int8_t, _Float16, 20) + RUN (int8_t, _Float16, 27) + + RUN (int8_t, _Float16, 4) + RUN (int8_t, _Float16, 8) + RUN (int8_t, _Float16, 11) + RUN (int8_t, _Float16, 29) + RUN (int8_t, _Float16, 49) +}