diff --git a/gcc/postreload.cc b/gcc/postreload.cc
index 41f61d32648..2f155a239ae 100644
--- a/gcc/postreload.cc
+++ b/gcc/postreload.cc
@@ -33,6 +33,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "emit-rtl.h"
 #include "recog.h"
 
+#include "cfghooks.h"
 #include "cfgrtl.h"
 #include "cfgbuild.h"
 #include "cfgcleanup.h"
@@ -221,13 +222,108 @@ reload_cse_regs_1 (void)
   init_alias_analysis ();
 
   FOR_EACH_BB_FN (bb, cfun)
-    FOR_BB_INSNS (bb, insn)
-      {
-	if (INSN_P (insn))
-	  cfg_changed |= reload_cse_simplify (insn, testreg);
+    {
+      /* If BB has a small number of predecessors, see if each of the
+	 has the same implicit set.  If so, record that implicit set so
+	 that we can add it to the cselib tables.  */
+      rtx_insn *implicit_set;
 
-	cselib_process_insn (insn);
-      }
+      implicit_set = NULL;
+      if (EDGE_COUNT (bb->preds) <= 3)
+	{
+	  edge e;
+	  edge_iterator ei;
+	  rtx src = NULL_RTX;
+	  rtx dest = NULL_RTX;
+	  bool found = true;
+
+	  /* Iterate over each incoming edge and see if they
+	     all have the same implicit set.  */
+	  FOR_EACH_EDGE (e, ei, bb->preds)
+	    {
+	      /* If the predecessor does not end in a conditional
+		 jump, then it does not have an implicit set.  */
+	      if (e->src != ENTRY_BLOCK_PTR_FOR_FN (cfun)
+		  && !block_ends_with_condjump_p (e->src))
+		{
+		  found = false;
+		  break;
+		}
+
+	      /* We know the predecessor ends with a conditional
+		 jump.  Now dig into the actal form of the jump
+		 to potentially extract an implicit set.  */
+	      rtx_insn *condjump = BB_END (e->src);
+	      if (condjump
+		  && any_condjump_p (condjump)
+		  && onlyjump_p (condjump))
+		{
+		  /* Extract the condition.  */
+		  rtx pat = PATTERN (condjump);
+		  rtx i_t_e = SET_SRC (pat);
+		  gcc_assert (GET_CODE (i_t_e) == IF_THEN_ELSE);
+		  rtx cond = XEXP (i_t_e, 0);
+		  if ((GET_CODE (cond) == EQ
+		       && GET_CODE (XEXP (i_t_e, 1)) == LABEL_REF
+		       && XEXP (XEXP (i_t_e, 1), 0) == BB_HEAD (bb))
+		      || (GET_CODE (cond) == NE
+			  && XEXP (i_t_e, 2) == pc_rtx
+			  && e->src->next_bb == bb))
+		    {
+		      /* If this is the first time through record
+			 the source and destination.  */
+		      if (!dest)
+			{
+			  dest = XEXP (cond, 0);
+			  src = XEXP (cond, 1);
+			}
+		      /* If this is not the first time through, then
+			 verify the source and destination match.  */
+		      else if (dest == XEXP (cond, 0) && src == XEXP (cond, 1))
+			;
+		      else
+			{
+			  found = false;
+			  break;
+			}
+		    }
+		}
+	      else
+		{
+		  found = false;
+		  break;
+		}
+	    }
+
+	  /* If all the incoming edges had the same implicit
+	     set, then create a dummy insn for that set.
+
+	     It will be entered into the cselib tables before
+	     we process the first real insn in this block.  */
+	  if (dest && found)
+	    implicit_set = make_insn_raw (gen_rtx_SET (dest, src));
+	}
+
+      FOR_BB_INSNS (bb, insn)
+	{
+	  if (INSN_P (insn))
+	    {
+	      /* If we recorded an implicit set, enter it
+		 into the tables before the first real insn.
+
+		 We have to do it this way because a CODE_LABEL
+		 will flush the cselib tables.  */
+	      if (implicit_set)
+		{
+		  cselib_process_insn (implicit_set);
+		  implicit_set = NULL;
+		}
+	      cfg_changed |= reload_cse_simplify (insn, testreg);
+	    }
+
+	  cselib_process_insn (insn);
+	}
+    }
 
   /* Clean up.  */
   end_alias_analysis ();
diff --git a/gcc/testsuite/gcc.target/riscv/implicit-set.c b/gcc/testsuite/gcc.target/riscv/implicit-set.c
new file mode 100644
index 00000000000..91106bb5d80
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/implicit-set.c
@@ -0,0 +1,40 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -dp" } */
+/* This was extracted from coremark.  */
+
+
+typedef signed short ee_s16;
+typedef struct list_data_s
+{
+    ee_s16 data16;
+    ee_s16 idx;
+} list_data;
+
+typedef struct list_head_s
+{
+    struct list_head_s *next;
+    struct list_data_s *info;
+} list_head;
+
+
+list_head *
+core_list_find(list_head *list, list_data *info)
+{
+    if (info->idx >= 0)
+    {
+        while (list && (list->info->idx != info->idx))
+            list = list->next;
+        return list;
+    }
+    else
+    {
+        while (list && ((list->info->data16 & 0xff) != info->data16))
+            list = list->next;
+        return list;
+    }
+}
+
+/* There was an unnecessary assignment to the return value until
+   recently.  Scan for that in the resulting output.  */
+/* { dg-final { scan-assembler-not "li\\ta0,0" } } */
+
