From patchwork Thu Nov 9 05:41:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: HAO CHEN GUI X-Patchwork-Id: 163226 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b129:0:b0:403:3b70:6f57 with SMTP id q9csp234260vqs; Wed, 8 Nov 2023 21:43:33 -0800 (PST) X-Google-Smtp-Source: AGHT+IGbU6xYT3fh28qiSpeEw6WaQHmPc0DYL4QEk8F3uJ515hnkAqeEBzU3cmlodTCGcbLcKL0f X-Received: by 2002:ac8:570b:0:b0:418:1057:d835 with SMTP id 11-20020ac8570b000000b004181057d835mr4367602qtw.34.1699508613456; Wed, 08 Nov 2023 21:43:33 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1699508613; cv=pass; d=google.com; s=arc-20160816; b=G40F0JIc7eRWBUQILyvCml5nw2r+nbH5BcrGmk+/2XdHgcA9SYq2N4971HxOdTQCKs oionF4bbds1pxHLtScXG+r7mvMgy+AQpsAWAVYiOKSaUfykGYtoUY3bgLgIUj1XMDXFZ /zg3auU0B1ep075q0Lo1bsMvVSZk+5lew85cNqNeZsXRFL2Jh39SLpxTTaJY8ukPffdp 21FFCdDwrUYnvl4iqFuDuc7/Fdj5YrlegISXTrP/f0NkOTxijFmS2bv100AovxEfDTJQ 3pRV2GQiQCazrT/A0ttRh4d1p2B69le7wUarJoMLTgnh9rmPa3cG1X16J1tlvCfCNvu0 6XjA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :subject:from:cc:to:content-language:user-agent:mime-version:date :message-id:dkim-signature:arc-filter:dmarc-filter:delivered-to; bh=qDNII9HJ60Pa/lpfphva7CFAGAE1T1bABhGhhBsn9Iw=; fh=hwIgBvsh5j40AeTrsvdAiUH3kwz4ybBL6X34athf4/4=; b=gl5WMmfnxyfDRDA0kH3eQHCQ/kkvUjx1poKjrpbZNmTOVYMHjzoUl8R11V33Eyh58A r20cvqqmdfudNwwc1vWecJXma+OmKqnrJTjqoJ+KDYQ/moRYJU9Xcw+iEJnu07MRqxty Uv/RHW51qXVRMA41pMiYB1pB9YZhXckYWcgkSWa3/9LOPA5o9LLtwn4EQ3WA9Bz5VktC x/pYQCW0y4/oJLTkvqhdRmpr/NULKxJxFBT5hdCqbpo3dKMmz6gv3mOFEm5d5S57OWZ+ gHYDx1H9OEKS/9pZNqH2KqoiUUv0FzKH0Q/9VDAOKVTsWoWzJJ+si7iirIty1aZPstVF LLNw== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@ibm.com header.s=pp1 header.b=nLRrvVD6; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=REJECT sp=NONE dis=NONE) header.from=ibm.com Received: from server2.sourceware.org (server2.sourceware.org. [8.43.85.97]) by mx.google.com with ESMTPS id h5-20020ac85845000000b0041cbf262514si2512782qth.19.2023.11.08.21.43.33 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Nov 2023 21:43:33 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@ibm.com header.s=pp1 header.b=nLRrvVD6; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=REJECT sp=NONE dis=NONE) header.from=ibm.com Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 3B8893858433 for ; Thu, 9 Nov 2023 05:43:33 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by sourceware.org (Postfix) with ESMTPS id 3E1CC3858D37 for ; Thu, 9 Nov 2023 05:43:08 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 3E1CC3858D37 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linux.ibm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 3E1CC3858D37 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=148.163.156.1 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699508589; cv=none; b=f/gLGOIuSGtj1DXXUf3sehdYy7ZeMmm4oHyMjXkEoPP8dow/jtJoQ1TGLw8HQhSK8wM1n5XahUm3k+uF8vqiCUZn1bG3KgTU8Y2yyIOpiIlsfN/eB6n+Yq6qIPAnIaPtqCFDczrL+kWDZ9yPGG5G5TFjXVP9844BHxWJygG+Pw0= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699508589; c=relaxed/simple; bh=Fk7O4ZWu0Um3hdb/cvDu++i2RAoFOVeVbc/SvKV/En8=; h=DKIM-Signature:Message-ID:Date:MIME-Version:To:From:Subject; b=e8NSdlM8rJMalo7nYsT/ImpldSQeOH1CK5l4NL4rETZE3kg65p9ioQBNKJTDPGm2XghZBEtF2U35kyV4USxXZcJGsHQEQffbqZYQQw0HheXcMHrUQ//WH3T4SZN9Fk08PGg3BEDCz734aeBfMhyVYbrn0Gv87rqyoavoX3fpvYw= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from pps.filterd (m0353726.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3A95RbWc001914; Thu, 9 Nov 2023 05:43:07 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=message-id : date : mime-version : to : cc : from : subject : content-type : content-transfer-encoding; s=pp1; bh=qDNII9HJ60Pa/lpfphva7CFAGAE1T1bABhGhhBsn9Iw=; b=nLRrvVD60/AWh1PoBd2vwjs8xJ3MvUbEKBNxdnPH2ob6d0Tmu2C5P+zA3nP7v+X93UTG jOSET7mIXbBEhiIy9ikSu+QS/HH44G+o7/2+C/7xS9cvl7hvy0ticaG4iywVTpQXmHg8 6kYLbawHfhWOHtYmSh209rIeOZtcXVFMlIgt5AP9rixbdXFSINe3tbX5oSBenKiqzJS5 rcbxr5PIOHrthVTv/FhFEGlK1DsSANaeIPsidmNKzOeQLMKTFFjAXdVMn6fsPGP0ZZDY jdB2Q31aBUy0uKJZKdC10qQ1E8TYKYpAiZLSZA5SekTccppJhVPm9xd1yElnYqpOjcn0 Dw== Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3u8s9v8fug-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 09 Nov 2023 05:43:06 +0000 Received: from m0353726.ppops.net (m0353726.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 3A95eVG5017411; Thu, 9 Nov 2023 05:43:06 GMT Received: from ppma12.dal12v.mail.ibm.com (dc.9e.1632.ip4.static.sl-reverse.com [50.22.158.220]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3u8s9v8f6r-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 09 Nov 2023 05:43:05 +0000 Received: from pps.filterd (ppma12.dal12v.mail.ibm.com [127.0.0.1]) by ppma12.dal12v.mail.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 3A94eWjx019261; Thu, 9 Nov 2023 05:41:23 GMT Received: from smtprelay04.fra02v.mail.ibm.com ([9.218.2.228]) by ppma12.dal12v.mail.ibm.com (PPS) with ESMTPS id 3u7w241sdm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 09 Nov 2023 05:41:23 +0000 Received: from smtpav06.fra02v.mail.ibm.com (smtpav06.fra02v.mail.ibm.com [10.20.54.105]) by smtprelay04.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 3A95fLIC44434110 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 9 Nov 2023 05:41:21 GMT Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6526220049; Thu, 9 Nov 2023 05:41:21 +0000 (GMT) Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id EC06720040; Thu, 9 Nov 2023 05:41:19 +0000 (GMT) Received: from [9.200.103.64] (unknown [9.200.103.64]) by smtpav06.fra02v.mail.ibm.com (Postfix) with ESMTP; Thu, 9 Nov 2023 05:41:19 +0000 (GMT) Message-ID: Date: Thu, 9 Nov 2023 13:41:18 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: gcc-patches Cc: Segher Boessenkool , David , "Kewen.Lin" , David , Richard Biener From: HAO CHEN GUI Subject: [PATCH, expand] Call misaligned memory reference in expand_builtin_return [PR112417] X-TM-AS-GCONF: 00 X-Proofpoint-GUID: C4_lupPeS6_dCDamrQfEZcTFqBi34Fn5 X-Proofpoint-ORIG-GUID: ATqJHHzuzOAZmNvi1sLRVDaHaVl-NlWn X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-09_04,2023-11-08_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=833 mlxscore=0 malwarescore=0 clxscore=1011 bulkscore=0 phishscore=0 spamscore=0 suspectscore=0 priorityscore=1501 impostorscore=0 adultscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2311090044 X-Spam-Status: No, score=-12.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782063943822008638 X-GMAIL-MSGID: 1782063943822008638 Hi, This patch modifies expand_builtin_return and make it call expand_misaligned_mem_ref to load unaligned memory. The memory reference pointed by void* pointer might be unaligned, so expanding it with unaligned move optabs is safe. The new test case illustrates the problem. rs6000 doesn't have unaligned vector load instruction with VSX disabled. When calling builtin_return, it shouldn't load the memory to vector register by unaligned load instruction directly. It should store it to an on stack variable by extract_bit_field then load to return register from stack by aligned load instruction. Bootstrapped and tested on x86 and powerpc64-linux BE and LE with no regressions. Is this OK for trunk? Thanks Gui Haochen ChangeLog expand: Call misaligned memory reference in expand_builtin_return expand_builtin_return loads memory to return registers. The memory might be unaligned compared to the mode of the registers. So it should be expanded by unaligned move optabs if the memory reference is unaligned. gcc/ PR target/112417 * builtins.cc (expand_builtin_return): Call expand_misaligned_mem_ref for loading unaligned memory reference. * builtins.h (expand_misaligned_mem_ref): Declare. * expr.cc (expand_misaligned_mem_ref): No longer static. gcc/testsuite/ PR target/112417 * gcc.target/powerpc/pr112417.c: New. patch.diff diff --git a/gcc/builtins.cc b/gcc/builtins.cc index cb90bd03b3e..b879eb88b7c 100644 --- a/gcc/builtins.cc +++ b/gcc/builtins.cc @@ -1816,7 +1816,12 @@ expand_builtin_return (rtx result) if (size % align != 0) size = CEIL (size, align) * align; reg = gen_rtx_REG (mode, INCOMING_REGNO (regno)); - emit_move_insn (reg, adjust_address (result, mode, size)); + rtx tmp = adjust_address (result, mode, size); + unsigned int align = MEM_ALIGN (tmp); + if (align < GET_MODE_ALIGNMENT (mode)) + tmp = expand_misaligned_mem_ref (tmp, mode, 1, align, + NULL, NULL); + emit_move_insn (reg, tmp); push_to_sequence (call_fusage); emit_use (reg); diff --git a/gcc/builtins.h b/gcc/builtins.h index 88a26d70cd5..a3d7954ee6e 100644 --- a/gcc/builtins.h +++ b/gcc/builtins.h @@ -157,5 +157,7 @@ extern internal_fn replacement_internal_fn (gcall *); extern bool builtin_with_linkage_p (tree); extern int type_to_class (tree); +extern rtx expand_misaligned_mem_ref (rtx, machine_mode, int, unsigned int, + rtx, rtx *); #endif /* GCC_BUILTINS_H */ diff --git a/gcc/expr.cc b/gcc/expr.cc index ed4dbb13d89..b0adb35a095 100644 --- a/gcc/expr.cc +++ b/gcc/expr.cc @@ -9156,7 +9156,7 @@ expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED, If the result can be stored at TARGET, and ALT_RTL is non-NULL, then *ALT_RTL is set to TARGET (before legitimziation). */ -static rtx +rtx expand_misaligned_mem_ref (rtx temp, machine_mode mode, int unsignedp, unsigned int align, rtx target, rtx *alt_rtl) { diff --git a/gcc/testsuite/gcc.target/powerpc/pr112417.c b/gcc/testsuite/gcc.target/powerpc/pr112417.c new file mode 100644 index 00000000000..ef82fc82033 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr112417.c @@ -0,0 +1,12 @@ +/* { dg-do compile { target { has_arch_pwr7 } } } */ +/* { dg-options "-mno-vsx -maltivec -O2" } */ + +void * foo (void * p) +{ + if (p) + __builtin_return (p); +} + +/* Ensure that unaligned load is generated via stack load/store. */ +/* { dg-final { scan-assembler {\mstw\M} { target { ! has_arch_ppc64 } } } } */ +/* { dg-final { scan-assembler {\mstd\M} { target has_arch_ppc64 } } } */