[V3] rs6000: Don't ICE when compiling the __builtin_vsx_splat_2di built-in [PR113950]
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Commit Message
Hi All,
The following patch has been bootstrapped and regtested on powerpc64le-linux.
When we expand the __builtin_vsx_splat_2di function, we were allowing immediate
value for second operand which causes an unrecognizable insn ICE. Even though
the immediate value was forced into a register, it wasn't correctly assigned
to the second operand. So corrected the assignment of op1 to operands[1].
2024-02-29 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
gcc/
PR target/113950
* config/rs6000/vsx.md (vsx_splat_<mode>): Corrected assignment to
operand1.
gcc/testsuite/
PR target/113950
* gcc.target/powerpc/pr113950.c: New testcase.
@@ -4666,8 +4666,8 @@
rtx op1 = operands[1];
if (MEM_P (op1))
operands[1] = rs6000_force_indexed_or_indirect_mem (op1);
- else if (!REG_P (op1))
- op1 = force_reg (<VSX_D:VEC_base>mode, op1);
+ else
+ operands[1] = force_reg (<VSX_D:VEC_base>mode, op1);
})
(define_insn "vsx_splat_<mode>_reg"
new file mode 100644
@@ -0,0 +1,24 @@
+/* PR target/113950 */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-O1 -mvsx" } */
+
+/* Verify we do not ICE on the following. */
+
+void abort (void);
+
+int main ()
+{
+ int i;
+ vector signed long long vsll_result, vsll_expected_result;
+ signed long long sll_arg1;
+
+ sll_arg1 = 300;
+ vsll_expected_result = (vector signed long long) {300, 300};
+ vsll_result = __builtin_vsx_splat_2di (sll_arg1);
+
+ for (i = 0; i < 2; i++)
+ if (vsll_result[i] != vsll_expected_result[i])
+ abort();
+
+ return 0;
+}