diff mbox series

[v2] x86: correct and improve "*vec_dupv2di"

Message ID b59a0cfa-20bb-1a5b-75ec-3b237b977b29@suse.com
State Accepted
Headers
Series [v2] x86: correct and improve "*vec_dupv2di" |

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Context Check Description
snail/gcc-patch-check success Github commit url

Commit Message

Jan Beulich June 16, 2023, 6:19 a.m. UTC 
  The input constraint for the %vmovddup alternative was wrong, as the
upper 16 XMM registers require AVX512VL to be used with this insn. To
compensate, introduce a new alternative permitting all 32 registers, by
broadcasting to the full 512 bits in that case if AVX512VL is not
available.

gcc/

	* config/i386/sse.md (vec_dupv2di): Correct %vmovddup input
	constraint. Add new AVX512F alternative.
---
Strictly speaking the new alternative could be enabled from AVX2
onwards, but vmovddup can frequently be a shorter encoding (VEX2 vs
VEX3).

It was suggested that the previously flawed %vmovddup alternative could
use "xm" as source constraint. But then its destination would better also
use "x", I think?
---
v2: Use "* return ..." form. Set "mode" to XI for new alternative
    without AVX512VL.

Comments

Li, Pan2 via Gcc-patches June 19, 2023, 1:43 a.m. UTC | #1 
> -----Original Message-----
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Friday, June 16, 2023 2:20 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Liu, Hongtao <hongtao.liu@intel.com>; Kirill Yukhin
> <kirill.yukhin@gmail.com>
> Subject: [PATCH v2] x86: correct and improve "*vec_dupv2di"
> 
> The input constraint for the %vmovddup alternative was wrong, as the upper
> 16 XMM registers require AVX512VL to be used with this insn. To
> compensate, introduce a new alternative permitting all 32 registers, by
> broadcasting to the full 512 bits in that case if AVX512VL is not available.
> 
> gcc/
> 
> 	* config/i386/sse.md (vec_dupv2di): Correct %vmovddup input
> 	constraint. Add new AVX512F alternative.
Could you add a testcase for that.
Ok with the testcase.
> ---
> Strictly speaking the new alternative could be enabled from AVX2 onwards,
> but vmovddup can frequently be a shorter encoding (VEX2 vs VEX3).
> 
> It was suggested that the previously flawed %vmovddup alternative could
> use "xm" as source constraint. But then its destination would better also use
> "x", I think?
> ---
> v2: Use "* return ..." form. Set "mode" to XI for new alternative
>     without AVX512VL.
> 
> --- a/gcc/config/i386/sse.md
> +++ b/gcc/config/i386/sse.md
> @@ -26033,19 +26033,35 @@
>  	   (symbol_ref "true")))])
> 
>  (define_insn "*vec_dupv2di"
> -  [(set (match_operand:V2DI 0 "register_operand"     "=x,v,v,x")
> +  [(set (match_operand:V2DI 0 "register_operand"     "=x,v,v,v,x")
>  	(vec_duplicate:V2DI
> -	  (match_operand:DI 1 "nonimmediate_operand" " 0,Yv,vm,0")))]
> +	  (match_operand:DI 1 "nonimmediate_operand" "
> 0,Yv,vm,Yvm,0")))]
>    "TARGET_SSE"
>    "@
>     punpcklqdq\t%0, %0
>     vpunpcklqdq\t{%d1, %0|%0, %d1}
> +   * return TARGET_AVX512VL ? \"vpbroadcastq\t{%1, %0|%0, %1}\" :
> + \"vpbroadcastq\t{%1, %g0|%g0, %1}\";
>     %vmovddup\t{%1, %0|%0, %1}
>     movlhps\t%0, %0"
> -  [(set_attr "isa" "sse2_noavx,avx,sse3,noavx")
> -   (set_attr "type" "sselog1,sselog1,sselog1,ssemov")
> -   (set_attr "prefix" "orig,maybe_evex,maybe_vex,orig")
> -   (set_attr "mode" "TI,TI,DF,V4SF")])
> +  [(set_attr "isa" "sse2_noavx,avx,avx512f,sse3,noavx")
> +   (set_attr "type" "sselog1,sselog1,ssemov,sselog1,ssemov")
> +   (set_attr "prefix" "orig,maybe_evex,evex,maybe_vex,orig")
> +   (set (attr "mode")
> +	(cond [(and (eq_attr "alternative" "2")
> +		    (match_test "!TARGET_AVX512VL"))
> +		 (const_string "XI")
> +	       (eq_attr "alternative" "3")
> +		 (const_string "DF")
> +	       (eq_attr "alternative" "4")
> +		 (const_string "V4SF")
> +	      ]
> +	      (const_string "TI")))
> +   (set (attr "enabled")
> +	(if_then_else
> +	  (eq_attr "alternative" "2")
> +	  (symbol_ref "TARGET_AVX512VL
> +		       || (TARGET_AVX512F && !TARGET_PREFER_AVX256)")
> +	  (const_string "*")))])
> 
>  (define_insn "avx2_vbroadcasti128_<mode>"
>    [(set (match_operand:VI_256 0 "register_operand" "=x,v,v")
diff mbox series

Patch

--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -26033,19 +26033,35 @@ 
 	   (symbol_ref "true")))])
 
 (define_insn "*vec_dupv2di"
-  [(set (match_operand:V2DI 0 "register_operand"     "=x,v,v,x")
+  [(set (match_operand:V2DI 0 "register_operand"     "=x,v,v,v,x")
 	(vec_duplicate:V2DI
-	  (match_operand:DI 1 "nonimmediate_operand" " 0,Yv,vm,0")))]
+	  (match_operand:DI 1 "nonimmediate_operand" " 0,Yv,vm,Yvm,0")))]
   "TARGET_SSE"
   "@
    punpcklqdq\t%0, %0
    vpunpcklqdq\t{%d1, %0|%0, %d1}
+   * return TARGET_AVX512VL ? \"vpbroadcastq\t{%1, %0|%0, %1}\" : \"vpbroadcastq\t{%1, %g0|%g0, %1}\";
    %vmovddup\t{%1, %0|%0, %1}
    movlhps\t%0, %0"
-  [(set_attr "isa" "sse2_noavx,avx,sse3,noavx")
-   (set_attr "type" "sselog1,sselog1,sselog1,ssemov")
-   (set_attr "prefix" "orig,maybe_evex,maybe_vex,orig")
-   (set_attr "mode" "TI,TI,DF,V4SF")])
+  [(set_attr "isa" "sse2_noavx,avx,avx512f,sse3,noavx")
+   (set_attr "type" "sselog1,sselog1,ssemov,sselog1,ssemov")
+   (set_attr "prefix" "orig,maybe_evex,evex,maybe_vex,orig")
+   (set (attr "mode")
+	(cond [(and (eq_attr "alternative" "2")
+		    (match_test "!TARGET_AVX512VL"))
+		 (const_string "XI")
+	       (eq_attr "alternative" "3")
+		 (const_string "DF")
+	       (eq_attr "alternative" "4")
+		 (const_string "V4SF")
+	      ]
+	      (const_string "TI")))
+   (set (attr "enabled")
+	(if_then_else
+	  (eq_attr "alternative" "2")
+	  (symbol_ref "TARGET_AVX512VL
+		       || (TARGET_AVX512F && !TARGET_PREFER_AVX256)")
+	  (const_string "*")))])
 
 (define_insn "avx2_vbroadcasti128_<mode>"
   [(set (match_operand:VI_256 0 "register_operand" "=x,v,v")