xtensa: Correct the relative RTX cost that corresponds to the Move Immediate "MOVI" instruction
Message ID | a62face7-9332-5122-b85d-97621513f42c@yahoo.co.jp |
---|---|
State | New, archived |
Headers |
Return-Path: <gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org> Delivered-To: ouuuleilei@gmail.com Received: by 2002:a98:d5ce:0:b0:178:cc93:bf7d with SMTP id g14csp1832199eik; Mon, 18 Jul 2022 05:48:44 -0700 (PDT) X-Google-Smtp-Source: AGRyM1ums0nUfZL11s0WZvMbjhdJTSYEwqxvywCos1iya4+38rPQhmI0MGqXCivtvjc/WgcdwUqz X-Received: by 2002:aa7:cdc9:0:b0:43a:7b6f:e569 with SMTP id h9-20020aa7cdc9000000b0043a7b6fe569mr36205092edw.401.1658148524559; Mon, 18 Jul 2022 05:48:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1658148524; cv=none; d=google.com; s=arc-20160816; b=wsXFzPbT08xKdnz7hAWvM1ie0jl97r9ve5S1hg+X1E9QxRUo/NTEYgCR40ycLfn8Wv u+iwWEuJQyEOhMmVn8sP6P+ewXNhVDla8A6/A8QL19nla0UJBIUzs0meO8Lu9H/0t7WG CKyVVVDF0kF2c4KfOzQQUloPs2eZ8MMrWwF0LhlZidqJZtgGcSUVA6QT0ADeDo62ZlTM nQbD6+sxNxHA/4ocBq+vf1EWF0O/Wc8zdMVtnlfAXINg0DDsbp9p3vQ6OZ53ldz666+4 vw2SqOAJnoG4kqhqNrN7u+rmkdJBUYIn31ReShZQOzcwfm2jjT1c245BBvjp06OvdmEC +uJA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:reply-to:from:list-subscribe:list-help:list-post :list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:subject:to:content-language:user-agent :mime-version:date:message-id:dmarc-filter:delivered-to :dkim-signature:dkim-filter; bh=O7kIFp1n6ObEjS4LjUDT0nr9Kjwu8i70YqMjB1kNfgg=; b=ZWcLTt7wAP2Hazggg1gFhWVjs0+Ri8iI9B4ZxvRDWyFE7jSmENrvwl6Sk5H67AUYJo hGuLoqZsZjvnRQkyUdCZ/SGg0aNCA+qXia6x9G3Wo+dN/qhu8mBoPiAwDGNj89BeEjUh njEWyrz+z3Bo9k/e9ndf8i5NyKdQiaRWtxjC24G+lqZu3IQkwcMGGMeiDIjTtCpjV2sy vYviVDuxpqDkH4ugjU4NfxeEfi3kB0NWa2sz2m4udC4jxFOUzFFObJNsW7ewKK58FXvB KY2+01PXu97avMjMy5iDrwV4bObovqg0ql7bYOmGMmVUSj1u8O9NxSzA15ukBnDmp6Jb cuvA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b="JeLo752/"; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id z18-20020a05640240d200b00435bcb8758dsi17928879edb.12.2022.07.18.05.48.44 for <ouuuleilei@gmail.com> (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Jul 2022 05:48:44 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b="JeLo752/"; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 4E507385277B for <ouuuleilei@gmail.com>; Mon, 18 Jul 2022 12:48:43 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 4E507385277B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1658148523; bh=O7kIFp1n6ObEjS4LjUDT0nr9Kjwu8i70YqMjB1kNfgg=; h=Date:To:Subject:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=JeLo752/qTkYicM8e+/e35t8Lw1kaGwHrrYjq8YzAvqJMUA09POAH84sGOiQ4W+9Y Y1m0lZyRLzMDYA+P1mXJuNfa/g/unl/N8tXvblfr4crMPwI/S/mx9MYOIgfPvE88O4 6KBNlP5DdsXt3Mqgr3mVGF9TEKZN+BvrJU4ZMRhg= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from nh501-vm9.bullet.mail.kks.yahoo.co.jp (nh501-vm9.bullet.mail.kks.yahoo.co.jp [183.79.56.139]) by sourceware.org (Postfix) with SMTP id 02E5C3852742 for <gcc-patches@gcc.gnu.org>; Mon, 18 Jul 2022 12:47:58 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 02E5C3852742 Received: from [183.79.100.141] by nh501.bullet.mail.kks.yahoo.co.jp with NNFMP; 18 Jul 2022 12:47:57 -0000 Received: from [183.79.100.133] by t504.bullet.mail.kks.yahoo.co.jp with NNFMP; 18 Jul 2022 12:47:57 -0000 Received: from [127.0.0.1] by omp502.mail.kks.yahoo.co.jp with NNFMP; 18 Jul 2022 12:47:57 -0000 X-Yahoo-Newman-Property: ymail-3 X-Yahoo-Newman-Id: 540204.58422.bm@omp502.mail.kks.yahoo.co.jp Received: (qmail 93391 invoked by alias); 18 Jul 2022 12:47:57 -0000 Received: from unknown (HELO ?192.168.2.4?) (175.177.45.176 with ) by smtp5008.mail.kks.ynwp.yahoo.co.jp with SMTP; 18 Jul 2022 12:47:57 -0000 X-YMail-JAS: eLFdfxkVM1kGiQSKNQ7c1_BvteaIHl_HvwzTniLjJjBR51TEbday8dW20jR0a_ZukIciqjUb885_09HgN.xcmkyENVCZ6pAQIbXuwLNR8zUuaOXSu8S3nenKAuxyCdwduw.21w.6GA-- X-Apparently-From: <jjsuwa_sys3175@yahoo.co.jp> X-YMail-OSG: X0wxItUVM1m3rVcJKnM4HQcflxbuYi9v0J3UzrZ5cmN_RgD bVJ5UspdMyDlySxjeshhRZ4Ik6pr8oLrMBxFC1V.lE.QKgB1GMODa_J2ixDb FtwGav25zkUQ4pq7_5c4RAmjjvK07yzLRm69WtnqSBFDCY0VEecq4ac1fTMi oh8m8lYObn2Y2sFnpJQvB_zniTvtnDlvCwkGpWQiBICMquLZ.zP2UYl3LUlv scoqIItyEZryIlbuU7TYoBT5izu9XAxcmrUnZ.jCpsw40UIuQd5ANrWI0OFC jLw.3_kEzScSAgBLCqVjc69X7ElB9FcFepuFVXrhvyGUjtOV.mtxAML7Fknf Z4uuZ.vO56I_dge8SdhwnQfaW7ojYXBzBNed17vGTA6Xjkug8asnp1cgzE.U uQkL2fLzPkVHkSqAu2h..Omt8.3WR9gmVL4HYQohQxXW2MPBJuDHRTWENX1n HdXsCv24IbkYGG4Sh_xVuJ832fz0EIp.98md5ym3P2SgUeJJQ_rfCWduuo.h K03_AOjgabJVLY6xPlP0LtLYnyPxfjEzxghK0BOFpbwhpuGyo1MCEg2akwWz OdBWWsCM8tAqNnELfl3.pfateHLhRst_o9qjHcZOLl70yhD30KX4ofE34SgU zuo.KPXVif30beVCb4i7hgyQIbnJN5Z9bLhaf2qadInXA6dGflGR.7WlXJxd DUbBx9TvigfYaMe_7PMOX5wtNhqvSOv2UGYBJneNEgsrF_u.38PW4IlHZh7A GAdhIDYCHVg.44jUrByTIl3xwrr2R5sMekiZNzMBt7OaT57vhZ1GEkyulBMh eK2AQ0S8pCnJ0oYaMNWGIgpesvv7iY8vLGco8Dg1zLDWwN9BuT4eMo6JjQv5 pBbRs_LR4LYopFSq5MclvH4vDbvEKbn5Xa9n3d.DAYD.0aFklcSNwke_KdFq ELyuZErLvStBZHE9Kow-- Message-ID: <a62face7-9332-5122-b85d-97621513f42c@yahoo.co.jp> Date: Mon, 18 Jul 2022 21:43:45 +0900 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 6.1; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.0.2 Content-Language: en-US To: GCC Patches <gcc-patches@gcc.gnu.org> Subject: [PATCH] xtensa: Correct the relative RTX cost that corresponds to the Move Immediate "MOVI" instruction Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-12.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list <gcc-patches.gcc.gnu.org> List-Unsubscribe: <https://gcc.gnu.org/mailman/options/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe> List-Archive: <https://gcc.gnu.org/pipermail/gcc-patches/> List-Post: <mailto:gcc-patches@gcc.gnu.org> List-Help: <mailto:gcc-patches-request@gcc.gnu.org?subject=help> List-Subscribe: <https://gcc.gnu.org/mailman/listinfo/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe> From: Takayuki 'January June' Suwa via Gcc-patches <gcc-patches@gcc.gnu.org> Reply-To: Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" <gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org> X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1738694747276540326?= X-GMAIL-MSGID: =?utf-8?q?1738694747276540326?= |
Series |
xtensa: Correct the relative RTX cost that corresponds to the Move Immediate "MOVI" instruction
|
|
Commit Message
Li, Pan2 via Gcc-patches
July 18, 2022, 12:43 p.m. UTC
This patch corrects the overestimation of the relative cost of '(set (reg) (const_int N))' where N fits into the instruction itself. In fact, such overestimation confuses the RTL loop invariant motion pass. As a result, it brings almost no negative impact from the speed point of view, but addtiional reg-reg move instructions and register allocation pressure about the size. /* example, optimized for size */ extern int foo(void); extern int array[16]; void test_0(void) { unsigned int i; for (i = 0; i < sizeof(array)/sizeof(*array); ++i) array[i] = 1024; } void test_1(void) { unsigned int i; for (i = 0; i < sizeof(array)/sizeof(*array); ++i) array[i] = array[i] ? 1024 : 0; } void test_2(void) { unsigned int i; for (i = 0; i < sizeof(array)/sizeof(*array); ++i) array[i] = foo() ? 0 : 1024; } ;; before .literal_position .literal .LC0, array test_0: l32r a3, .LC0 movi.n a2, 0 movi a4, 0x400 // OK .L2: s32i.n a4, a3, 0 addi.n a2, a2, 1 addi.n a3, a3, 4 bnei a2, 16, .L2 ret.n .literal_position .literal .LC1, array test_1: l32r a2, .LC1 movi.n a3, 0 movi a5, 0x400 // NG .L6: l32i.n a4, a2, 0 beqz.n a4, .L5 mov.n a4, a5 // should be "movi a4, 0x400" .L5: s32i.n a4, a2, 0 addi.n a3, a3, 1 addi.n a2, a2, 4 bnei a3, 16, .L6 ret.n .literal_position .literal .LC2, array test_2: addi sp, sp, -32 s32i.n a12, sp, 24 l32r a12, .LC2 s32i.n a13, sp, 20 s32i.n a14, sp, 16 s32i.n a15, sp, 12 s32i.n a0, sp, 28 addi a13, a12, 64 movi.n a15, 0 // NG movi a14, 0x400 // and wastes callee-saved registers (only 4) .L11: call0 foo mov.n a3, a14 // should be "movi a3, 0x400" movnez a3, a15, a2 s32i.n a3, a12, 0 addi.n a12, a12, 4 bne a12, a13, .L11 l32i.n a0, sp, 28 l32i.n a12, sp, 24 l32i.n a13, sp, 20 l32i.n a14, sp, 16 l32i.n a15, sp, 12 addi sp, sp, 32 ret.n ;; after .literal_position .literal .LC0, array test_0: l32r a3, .LC0 movi.n a2, 0 movi a4, 0x400 // OK .L2: s32i.n a4, a3, 0 addi.n a2, a2, 1 addi.n a3, a3, 4 bnei a2, 16, .L2 ret.n .literal_position .literal .LC1, array test_1: l32r a2, .LC1 movi.n a3, 0 .L6: l32i.n a4, a2, 0 beqz.n a4, .L5 movi a4, 0x400 // OK .L5: s32i.n a4, a2, 0 addi.n a3, a3, 1 addi.n a2, a2, 4 bnei a3, 16, .L6 ret.n .literal_position .literal .LC2, array test_2: addi sp, sp, -16 s32i.n a12, sp, 8 l32r a12, .LC2 s32i.n a13, sp, 4 s32i.n a0, sp, 12 addi a13, a12, 64 .L11: call0 foo movi.n a3, 0 // OK movi a4, 0x400 // and less register allocation pressure moveqz a3, a4, a2 s32i.n a3, a12, 0 addi.n a12, a12, 4 bne a12, a13, .L11 l32i.n a0, sp, 12 l32i.n a12, sp, 8 l32i.n a13, sp, 4 addi sp, sp, 16 ret.n gcc/ChangeLog: * config/xtensa/xtensa.cc (xtensa_rtx_costs): Change the relative cost of '(set (reg) (const_int N))' where N fits into signed 12-bit from 4 to 0 if optimizing for size. And use the appropriate macro instead of the bare number 4. --- gcc/config/xtensa/xtensa.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Comments
On Mon, Jul 18, 2022 at 5:47 AM Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> wrote: > > This patch corrects the overestimation of the relative cost of > '(set (reg) (const_int N))' where N fits into the instruction itself. > > In fact, such overestimation confuses the RTL loop invariant motion pass. > As a result, it brings almost no negative impact from the speed point of > view, but addtiional reg-reg move instructions and register allocation > pressure about the size. > ... > gcc/ChangeLog: > > * config/xtensa/xtensa.cc (xtensa_rtx_costs): > Change the relative cost of '(set (reg) (const_int N))' where > N fits into signed 12-bit from 4 to 0 if optimizing for size. > And use the appropriate macro instead of the bare number 4. > --- > gcc/config/xtensa/xtensa.cc | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Regtested for target=xtensa-linux-uclibc, no new regressions. Committed to master.
diff --git a/gcc/config/xtensa/xtensa.cc b/gcc/config/xtensa/xtensa.cc index 94337452ba8..a851a7ae6b3 100644 --- a/gcc/config/xtensa/xtensa.cc +++ b/gcc/config/xtensa/xtensa.cc @@ -4073,7 +4073,7 @@ xtensa_rtx_costs (rtx x, machine_mode mode, int outer_code, case SET: if (xtensa_simm12b (INTVAL (x))) { - *total = 4; + *total = speed ? COSTS_N_INSNS (1) : 0; return true; } break;