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Mon, 4 Mar 2024 16:49:38 +0000 (UTC) Received: from tucnak.zalov.cz (unknown [10.45.226.25]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 5C1852166B31; Mon, 4 Mar 2024 16:49:38 +0000 (UTC) Received: from tucnak.zalov.cz (localhost [127.0.0.1]) by tucnak.zalov.cz (8.17.1/8.17.1) with ESMTPS id 424Gnaj91800486 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NOT); Mon, 4 Mar 2024 17:49:36 +0100 Received: (from jakub@localhost) by tucnak.zalov.cz (8.17.1/8.17.1/Submit) id 424GnZHj1800485; Mon, 4 Mar 2024 17:49:35 +0100 Date: Mon, 4 Mar 2024 17:49:35 +0100 From: Jakub Jelinek To: Jeff Law , Rainer Orth Cc: Greg McGary , gcc-patches@gcc.gnu.org Subject: [PATCH] combine: Fix recent WORD_REGISTER_OPERATIONS check [PR113010] Message-ID: References: <20240227001736.3690294-1-gkm@rivosinc.com> <4a986781-7be8-4e45-a2d7-567d1df58ee3@gmail.com> MIME-Version: 1.0 In-Reply-To: X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.6 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Disposition: inline X-Spam-Status: No, score=-3.9 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: Jakub Jelinek Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1792615143435841070 X-GMAIL-MSGID: 1792615143435841070 On Mon, Mar 04, 2024 at 05:18:39PM +0100, Rainer Orth wrote: > > On 2/26/24 17:17, Greg McGary wrote: > >> The sign-bit-copies of a sign-extending load cannot be known until runtime on > >> WORD_REGISTER_OPERATIONS targets, except in the case of a zero-extending MEM > >> load. See the fix for PR112758. > >> 2024-02-22 Greg McGary > >> PR rtl-optimization/113010 > >> * combine.cc (simplify_comparison): Simplify a SUBREG on > >> WORD_REGISTER_OPERATIONS targets only if it is a zero-extending > >> MEM load. > >> * gcc.c-torture/execute/pr113010.c: New test. > > I think this is fine for the trunk. I'll do some final testing on it > > tomorrow. > > unfortunately, the patch broke Solaris/SPARC bootstrap > (sparc-sun-solaris2.11): > > /vol/gcc/src/hg/master/local/gcc/combine.cc: In function 'rtx_code simplify_comparison(rtx_code, rtx_def**, rtx_def**)': > /vol/gcc/src/hg/master/local/gcc/combine.cc:12101:25: error: '*(unsigned int*)((char*)&inner_mode + offsetof(scalar_int_mode, scalar_int_mode::m_mode))' may be used uninitialized [-Werror=maybe-uninitialized] > 12101 | scalar_int_mode mode, inner_mode, tmode; > | ^~~~~~~~~~ I don't see how it could ever work properly, inner_mode in that spot is just uninitialized. I think we shouldn't worry about paradoxical subregs of non-scalar_int_mode REGs/MEMs and for the scalar_int_mode ones should initialize inner_mode before we use it. Another option would be to use maybe_lt (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (op0))), BITS_PER_WORD) and load_extend_op (GET_MODE (SUBREG_REG (op0))) == ZERO_EXTEND, or set machine_mode smode = GET_MODE (SUBREG_REG (op0)); and use it in those two spots. 2024-03-04 Jakub Jelinek PR rtl-optimization/113010 * combine.cc (simplify_comparison): Guard the WORD_REGISTER_OPERATIONS check on scalar_int_mode of SUBREG_REG and initialize inner_mode. Jakub --- gcc/combine.cc.jj 2024-03-04 10:01:21.054937316 +0100 +++ gcc/combine.cc 2024-03-04 17:40:51.556052647 +0100 @@ -12554,6 +12554,8 @@ simplify_comparison (enum rtx_code code, if (paradoxical_subreg_p (op0)) { if (WORD_REGISTER_OPERATIONS + && is_a (GET_MODE (SUBREG_REG (op0)), + &inner_mode) && GET_MODE_PRECISION (inner_mode) < BITS_PER_WORD /* On WORD_REGISTER_OPERATIONS targets the bits beyond sub_mode aren't considered undefined,