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Mon, 4 Mar 2024 08:25:53 +0000 (UTC) Received: from tucnak.zalov.cz (unknown [10.45.226.25]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 15B8D492BC7; Mon, 4 Mar 2024 08:25:52 +0000 (UTC) Received: from tucnak.zalov.cz (localhost [127.0.0.1]) by tucnak.zalov.cz (8.17.1/8.17.1) with ESMTPS id 4248Ppl11793365 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NOT); Mon, 4 Mar 2024 09:25:51 +0100 Received: (from jakub@localhost) by tucnak.zalov.cz (8.17.1/8.17.1/Submit) id 4248PpxS1793364; Mon, 4 Mar 2024 09:25:51 +0100 Date: Mon, 4 Mar 2024 09:25:50 +0100 From: Jakub Jelinek To: Uros Bizjak Cc: gcc-patches@gcc.gnu.org Subject: [PATCH] i386: Fix ICEs with SUBREGs from vector etc. constants to XFmode [PR114184] Message-ID: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.9 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Disposition: inline X-Spam-Status: No, score=-3.7 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, KAM_SHORT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: Jakub Jelinek Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1792583485009051862 X-GMAIL-MSGID: 1792583485009051862 Hi! The Intel extended format has the various weird number categories, pseudo denormals, pseudo infinities, pseudo NaNs and unnormals. Those are not representable in the GCC real_value and so neither GIMPLE nor RTX VIEW_CONVERT_EXPR/SUBREG folding folds those into constants. As can be seen on the following testcase, because it isn't folded (since GCC 12, before that we were folding it) we can end up with a SUBREG of a CONST_VECTOR or similar constant, which isn't valid general_operand, so we ICE during vregs pass trying to recognize the move instruction. Initially I thought it is a middle-end bug, the movxf instruction has general_operand predicate, but the middle-end certainly never tests that predicate, seems moves are special optabs. And looking at other mov optabs, e.g. for vector modes the i386 patterns use nonimmediate_operand predicate on the input, yet ix86_expand_vector_move deals with CONSTANT_P and SUBREG of CONSTANT_P arguments which if the predicate was checked couldn't ever make it through. The following patch handles this case similarly to the ix86_expand_vector_move's SUBREG of CONSTANT_P case, does it just for XFmode because I believe that is the only mode that needs it from the scalar ones, others should just be folded. Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? 2024-03-04 Jakub Jelinek PR target/114184 * config/i386/i386-expand.cc (ix86_expand_move): If XFmode op1 is SUBREG of CONSTANT_P, force the SUBREG_REG into memory or register. * gcc.target/i386/pr114184.c: New test. Jakub --- gcc/config/i386/i386-expand.cc.jj 2024-03-01 14:56:34.120925989 +0100 +++ gcc/config/i386/i386-expand.cc 2024-03-03 18:41:08.278793046 +0100 @@ -451,6 +451,20 @@ ix86_expand_move (machine_mode mode, rtx && GET_MODE (SUBREG_REG (op1)) == DImode && SUBREG_BYTE (op1) == 0) op1 = gen_rtx_ZERO_EXTEND (TImode, SUBREG_REG (op1)); + /* As not all values in XFmode are representable in real_value, + we might be called with unfoldable SUBREGs of constants. */ + if (mode == XFmode + && CONSTANT_P (SUBREG_REG (op1)) + && can_create_pseudo_p ()) + { + machine_mode imode = GET_MODE (SUBREG_REG (op1)); + rtx r = force_const_mem (imode, SUBREG_REG (op1)); + if (r) + r = validize_mem (r); + else + r = force_reg (imode, SUBREG_REG (op1)); + op1 = simplify_gen_subreg (mode, r, imode, SUBREG_BYTE (op1)); + } break; } --- gcc/testsuite/gcc.target/i386/pr114184.c.jj 2024-03-03 18:45:45.912964030 +0100 +++ gcc/testsuite/gcc.target/i386/pr114184.c 2024-03-03 18:45:37.639078138 +0100 @@ -0,0 +1,22 @@ +/* PR target/114184 */ +/* { dg-do compile } */ +/* { dg-options "-Og -mavx2" } */ + +typedef unsigned char V __attribute__((vector_size (32))); +typedef unsigned char W __attribute__((vector_size (16))); + +_Complex long double +foo (void) +{ + _Complex long double d; + *(V *)&d = (V) { 149, 136, 89, 42, 38, 240, 196, 194 }; + return d; +} + +long double +bar (void) +{ + long double d; + *(W *)&d = (W) { 149, 136, 89, 42, 38, 240, 196, 194 }; + return d; +}