diff --git a/gcc/testsuite/gcc.target/powerpc/vector-size-32-1.c b/gcc/testsuite/gcc.target/powerpc/vector-size-32-1.c
new file mode 100644
index 00000000000..fd1e2decea7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vector-size-32-1.c
@@ -0,0 +1,106 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target power10_ok } */
+/* { dg-options "-mdejagnu-cpu=power10 -O2 -mvector-size-32" } */
+
+/* Test whether the __attrbiute__((__vector_size(32))) generates paired vector
+   loads and stores with the -mvector-size-32 option.  This file tests 32-byte
+   vectors with 4 double elements.  */
+
+typedef double vectype_t __attribute__((__vector_size__(32)));
+
+void
+test_add (vectype_t *dest,
+	  vectype_t *a,
+	  vectype_t *b)
+{
+  /* 2 lxvp, 2 xvadddp, 1 stxvp.  */
+  *dest = *a + *b;
+}
+
+void
+test_sub (vectype_t *dest,
+	  vectype_t *a,
+	  vectype_t *b)
+{
+  /* 2 lxvp, 2 xvsubdp, 1 stxvp.  */
+  *dest = *a - *b;
+}
+
+void
+test_multiply (vectype_t *dest,
+	       vectype_t *a,
+	       vectype_t *b)
+{
+  /* 2 lxvp, 2 xvmuldp, 1 stxvp.  */
+  *dest = *a * *b;
+}
+
+void
+test_divide (vectype_t *dest,
+	     vectype_t *a,
+	     vectype_t *b)
+{
+  /* 2 lxvp, 2 xvdivdp, 1 stxvp.  */
+  *dest = *a / *b;
+}
+
+void
+test_negate (vectype_t *dest,
+	     vectype_t *a,
+	     vectype_t *b)
+{
+  /* 2 lxvp, 2 xvnegdp, 1 stxvp.  */
+  *dest = - *a;
+}
+
+void
+test_fma (vectype_t *dest,
+	  vectype_t *a,
+	  vectype_t *b,
+	  vectype_t *c)
+{
+  /* 2 lxvp, 2 xvmadd{a,m}dp, 1 stxvp.  */
+  *dest = (*a * *b) + *c;
+}
+
+void
+test_fms (vectype_t *dest,
+	  vectype_t *a,
+	  vectype_t *b,
+	  vectype_t *c)
+{
+  /* 2 lxvp, 2 xvmsub{a,m}dp, 1 stxvp.  */
+  *dest = (*a * *b) - *c;
+}
+
+void
+test_nfma (vectype_t *dest,
+	   vectype_t *a,
+	   vectype_t *b,
+	   vectype_t *c)
+{
+  /* 2 lxvp, 2 xvnmadddp, 1 stxvp.  */
+  *dest = -((*a * *b) + *c);
+}
+
+void
+test_nfms (vectype_t *dest,
+	   vectype_t *a,
+	   vectype_t *b,
+	   vectype_t *c)
+{
+  /* 2 lxvp, 2 xvnmsubdp, 1 stxvp.  */
+  *dest = -((*a * *b) - *c);
+}
+
+/* { dg-final { scan-assembler-times {\mlxvp\M}       21 } } */
+/* { dg-final { scan-assembler-times {\mstxvp\M}       9 } } */
+/* { dg-final { scan-assembler-times {\mxvadddp\M}     2 } } */
+/* { dg-final { scan-assembler-times {\mxvdivdp\M}     2 } } */
+/* { dg-final { scan-assembler-times {\mxvmadd.dp\M}   2 } } */
+/* { dg-final { scan-assembler-times {\mxvmsub.dp\M}   2 } } */
+/* { dg-final { scan-assembler-times {\mxvmuldp\M}     2 } } */
+/* { dg-final { scan-assembler-times {\mxvnegdp\M}     2 } } */
+/* { dg-final { scan-assembler-times {\mxvnmadd.dp\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mxvnmsub.dp\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mxvsubdp\M}     2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vector-size-32-2.c b/gcc/testsuite/gcc.target/powerpc/vector-size-32-2.c
new file mode 100644
index 00000000000..eccc9c7aabf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vector-size-32-2.c
@@ -0,0 +1,106 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target power10_ok } */
+/* { dg-options "-mdejagnu-cpu=power10 -O2 -mvector-size-32" } */
+
+/* Test whether the __attrbiute__((__vector_size(32))) generates paired vector
+   loads and stores with the -mvector-size-32 option.  This file tests 32-byte
+   vectors with 8 float elements.  */
+
+typedef float vectype_t __attribute__((__vector_size__(32)));
+
+void
+test_add (vectype_t *dest,
+	  vectype_t *a,
+	  vectype_t *b)
+{
+  /* 2 lxvp, 2 xvaddsp, 1 stxvp.  */
+  *dest = *a + *b;
+}
+
+void
+test_sub (vectype_t *dest,
+	  vectype_t *a,
+	  vectype_t *b)
+{
+  /* 2 lxvp, 2 xvsubsp, 1 stxvp.  */
+  *dest = *a - *b;
+}
+
+void
+test_multiply (vectype_t *dest,
+	       vectype_t *a,
+	       vectype_t *b)
+{
+  /* 2 lxvp, 2 xvmulsp, 1 stxvp.  */
+  *dest = *a * *b;
+}
+
+void
+test_divide (vectype_t *dest,
+	     vectype_t *a,
+	     vectype_t *b)
+{
+  /* 2 lxvp, 2 xvdivsp, 1 stxvp.  */
+  *dest = *a / *b;
+}
+
+void
+test_negate (vectype_t *dest,
+	     vectype_t *a,
+	     vectype_t *b)
+{
+  /* 2 lxvp, 2 xvnegsp, 1 stxvp.  */
+  *dest = - *a;
+}
+
+void
+test_fma (vectype_t *dest,
+	  vectype_t *a,
+	  vectype_t *b,
+	  vectype_t *c)
+{
+  /* 2 lxvp, 2 xvmadd{a,m}sp, 1 stxvp.  */
+  *dest = (*a * *b) + *c;
+}
+
+void
+test_fms (vectype_t *dest,
+	  vectype_t *a,
+	  vectype_t *b,
+	  vectype_t *c)
+{
+  /* 2 lxvp, 2 xvmsub{a,m}sp, 1 stxvp.  */
+  *dest = (*a * *b) - *c;
+}
+
+void
+test_nfma (vectype_t *dest,
+	   vectype_t *a,
+	   vectype_t *b,
+	   vectype_t *c)
+{
+  /* 2 lxvp, 2 xvnmaddsp, 1 stxvp.  */
+  *dest = -((*a * *b) + *c);
+}
+
+void
+test_nfms (vectype_t *dest,
+	   vectype_t *a,
+	   vectype_t *b,
+	   vectype_t *c)
+{
+  /* 2 lxvp, 2 xvnmsubsp, 1 stxvp.  */
+  *dest = -((*a * *b) - *c);
+}
+
+/* { dg-final { scan-assembler-times {\mlxvp\M}       21 } } */
+/* { dg-final { scan-assembler-times {\mstxvp\M}       9 } } */
+/* { dg-final { scan-assembler-times {\mxvaddsp\M}     2 } } */
+/* { dg-final { scan-assembler-times {\mxvdivsp\M}     2 } } */
+/* { dg-final { scan-assembler-times {\mxvmadd.sp\M}   2 } } */
+/* { dg-final { scan-assembler-times {\mxvmsub.sp\M}   2 } } */
+/* { dg-final { scan-assembler-times {\mxvmulsp\M}     2 } } */
+/* { dg-final { scan-assembler-times {\mxvnegsp\M}     2 } } */
+/* { dg-final { scan-assembler-times {\mxvnmadd.sp\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mxvnmsub.sp\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mxvsubsp\M}     2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vector-size-32-3.c b/gcc/testsuite/gcc.target/powerpc/vector-size-32-3.c
new file mode 100644
index 00000000000..b1952b046f9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vector-size-32-3.c
@@ -0,0 +1,137 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target power10_ok } */
+/* { dg-options "-mdejagnu-cpu=power10 -O2 -mvector-size-32" } */
+
+/* Test whether the __attrbiute__((__vector_size(32))) generates paired vector
+   loads and stores with the -mvector-size-32 option.  This file tests 32-byte
+   vectors with 4 64-bit integer elements.  */
+
+typedef long long vectype_t __attribute__((__vector_size__(32)));
+
+void
+test_add (vectype_t *dest,
+	  vectype_t *a,
+	  vectype_t *b)
+{
+  /* 2 lxvp, 2 vaddudm, 1 stxvp.  */
+  *dest = *a + *b;
+}
+
+void
+test_sub (vectype_t *dest,
+	  vectype_t *a,
+	  vectype_t *b)
+{
+  /* 2 lxvp, 2 vsubudm, 1 stxvp.  */
+  *dest = *a - *b;
+}
+
+void
+test_negate (vectype_t *dest,
+	     vectype_t *a)
+{
+  /* 2 lxvp, 2 vnegd, 1 stxvp.  */
+  *dest = - *a;
+}
+
+void
+test_not (vectype_t *dest,
+	  vectype_t *a)
+{
+  /* 2 lxvp, 2 xxlnor, 1 stxvp.  */
+  *dest = ~ *a;
+}
+
+void
+test_and (vectype_t *dest,
+	  vectype_t *a,
+	  vectype_t *b)
+{
+  /* 2 lxvp, 2 xxland, 1 stxvp.  */
+  *dest = *a & *b;
+}
+
+void
+test_or (vectype_t *dest,
+	 vectype_t *a,
+	 vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlor, 1 stxvp.  */
+  *dest = *a | *b;
+}
+
+void
+test_xor (vectype_t *dest,
+	  vectype_t *a,
+	  vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlxor, 1 stxvp.  */
+  *dest = *a ^ *b;
+}
+
+void
+test_andc_1 (vectype_t *dest,
+	     vectype_t *a,
+	     vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlandc, 1 stxvp.  */
+  *dest = (~ *a) & *b;
+}
+
+void
+test_andc_2 (vectype_t *dest,
+	     vectype_t *a,
+	     vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlandc, 1 stxvp.  */
+  *dest = *a & (~ *b);
+}
+
+void
+test_orc_1 (vectype_t *dest,
+	    vectype_t *a,
+	    vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlorc, 1 stxvp.  */
+  *dest = (~ *a) | *b;
+}
+
+void
+test_orc_2 (vectype_t *dest,
+	    vectype_t *a,
+	    vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlorc, 1 stxvp.  */
+  *dest = *a | (~ *b);
+}
+
+void
+test_nand (vectype_t *dest,
+	   vectype_t *a,
+	   vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlnand, 1 stxvp.  */
+  *dest = ~(*a & *b);
+}
+
+void
+test_nor (vectype_t *dest,
+	  vectype_t *a,
+	  vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlnor, 1 stxvp.  */
+  *dest = ~(*a | *b);
+}
+
+/* { dg-final { scan-assembler-times {\mlxvp\M}    24 } } */
+/* { dg-final { scan-assembler-times {\mstxvp\M}   13 } } */
+/* { dg-final { scan-assembler-times {\mvaddudm\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mvnegd\M}    2 } } */
+/* { dg-final { scan-assembler-times {\mvsubudm\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mxxland\M}   2 } } */
+/* { dg-final { scan-assembler-times {\mxxlandc\M}  4 } } */
+/* { dg-final { scan-assembler-times {\mxxlnand\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mxxlnor\M}   4 } } */
+/* { dg-final { scan-assembler-times {\mxxlor\M}    2 } } */
+/* { dg-final { scan-assembler-times {\mxxlorc\M}   4 } } */
+/* { dg-final { scan-assembler-times {\mxxlxor\M}   2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vector-size-32-4.c b/gcc/testsuite/gcc.target/powerpc/vector-size-32-4.c
new file mode 100644
index 00000000000..110292bb4df
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vector-size-32-4.c
@@ -0,0 +1,137 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target power10_ok } */
+/* { dg-options "-mdejagnu-cpu=power10 -O2 -mvector-size-32" } */
+
+/* Test whether the __attrbiute__((__vector_size(32))) generates paired vector
+   loads and stores with the -mvector-size-32 option.  This file tests 32-byte
+   vectors with 4 64-bit integer elements.  */
+
+typedef int vectype_t __attribute__((__vector_size__(32)));
+
+void
+test_add (vectype_t *dest,
+	  vectype_t *a,
+	  vectype_t *b)
+{
+  /* 2 lxvp, 2 vadduwm, 1 stxvp.  */
+  *dest = *a + *b;
+}
+
+void
+test_sub (vectype_t *dest,
+	  vectype_t *a,
+	  vectype_t *b)
+{
+  /* 2 lxvp, 2 vsubuwm, 1 stxvp.  */
+  *dest = *a - *b;
+}
+
+void
+test_negate (vectype_t *dest,
+	     vectype_t *a)
+{
+  /* 2 lxvp, 2 vnegw, 1 stxvp.  */
+  *dest = - *a;
+}
+
+void
+test_not (vectype_t *dest,
+	  vectype_t *a)
+{
+  /* 2 lxvp, 2 xxlnor, 1 stxvp.  */
+  *dest = ~ *a;
+}
+
+void
+test_and (vectype_t *dest,
+	  vectype_t *a,
+	  vectype_t *b)
+{
+  /* 2 lxvp, 2 xxland, 1 stxvp.  */
+  *dest = *a & *b;
+}
+
+void
+test_or (vectype_t *dest,
+	 vectype_t *a,
+	 vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlor, 1 stxvp.  */
+  *dest = *a | *b;
+}
+
+void
+test_xor (vectype_t *dest,
+	  vectype_t *a,
+	  vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlxor, 1 stxvp.  */
+  *dest = *a ^ *b;
+}
+
+void
+test_andc_1 (vectype_t *dest,
+	     vectype_t *a,
+	     vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlandc, 1 stxvp.  */
+  *dest = (~ *a) & *b;
+}
+
+void
+test_andc_2 (vectype_t *dest,
+	     vectype_t *a,
+	     vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlandc, 1 stxvp.  */
+  *dest = *a & (~ *b);
+}
+
+void
+test_orc_1 (vectype_t *dest,
+	    vectype_t *a,
+	    vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlorc, 1 stxvp.  */
+  *dest = (~ *a) | *b;
+}
+
+void
+test_orc_2 (vectype_t *dest,
+	    vectype_t *a,
+	    vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlorc, 1 stxvp.  */
+  *dest = *a | (~ *b);
+}
+
+void
+test_nand (vectype_t *dest,
+	   vectype_t *a,
+	   vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlnand, 1 stxvp.  */
+  *dest = ~(*a & *b);
+}
+
+void
+test_nor (vectype_t *dest,
+	  vectype_t *a,
+	  vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlnor, 1 stxvp.  */
+  *dest = ~(*a | *b);
+}
+
+/* { dg-final { scan-assembler-times {\mlxvp\M}    24 } } */
+/* { dg-final { scan-assembler-times {\mstxvp\M}   13 } } */
+/* { dg-final { scan-assembler-times {\mvadduwm\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mvnegw\M}    2 } } */
+/* { dg-final { scan-assembler-times {\mvsubuwm\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mxxland\M}   2 } } */
+/* { dg-final { scan-assembler-times {\mxxlandc\M}  4 } } */
+/* { dg-final { scan-assembler-times {\mxxlnand\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mxxlnor\M}   4 } } */
+/* { dg-final { scan-assembler-times {\mxxlor\M}    2 } } */
+/* { dg-final { scan-assembler-times {\mxxlorc\M}   4 } } */
+/* { dg-final { scan-assembler-times {\mxxlxor\M}   2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vector-size-32-5.c b/gcc/testsuite/gcc.target/powerpc/vector-size-32-5.c
new file mode 100644
index 00000000000..8921b04c468
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vector-size-32-5.c
@@ -0,0 +1,137 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target power10_ok } */
+/* { dg-options "-mdejagnu-cpu=power10 -O2 -mvector-size-32" } */
+
+/* Test whether the __attrbiute__((__vector_size(32))) generates paired vector
+   loads and stores with the -mvector-size-32 option.  This file tests 32-byte
+   vectors with 4 64-bit integer elements.  */
+
+typedef short vectype_t __attribute__((__vector_size__(32)));
+
+void
+test_add (vectype_t *dest,
+	  vectype_t *a,
+	  vectype_t *b)
+{
+  /* 2 lxvp, 2 vadduhm, 1 stxvp.  */
+  *dest = *a + *b;
+}
+
+void
+test_sub (vectype_t *dest,
+	  vectype_t *a,
+	  vectype_t *b)
+{
+  /* 2 lxvp, 2 vsubuhm, 1 stxvp.  */
+  *dest = *a - *b;
+}
+
+void
+test_negate (vectype_t *dest,
+	     vectype_t *a)
+{
+  /* 2 lxvp, 1 xxspltib, 2 vsubuhm, 1 stxvp.  */
+  *dest = - *a;
+}
+
+void
+test_not (vectype_t *dest,
+	  vectype_t *a)
+{
+  /* 2 lxvp, 2 xxlnor, 1 stxvp.  */
+  *dest = ~ *a;
+}
+
+void
+test_and (vectype_t *dest,
+	  vectype_t *a,
+	  vectype_t *b)
+{
+  /* 2 lxvp, 2 xxland, 1 stxvp.  */
+  *dest = *a & *b;
+}
+
+void
+test_or (vectype_t *dest,
+	 vectype_t *a,
+	 vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlor, 1 stxvp.  */
+  *dest = *a | *b;
+}
+
+void
+test_xor (vectype_t *dest,
+	  vectype_t *a,
+	  vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlxor, 1 stxvp.  */
+  *dest = *a ^ *b;
+}
+
+void
+test_andc_1 (vectype_t *dest,
+	     vectype_t *a,
+	     vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlandc, 1 stxvp.  */
+  *dest = (~ *a) & *b;
+}
+
+void
+test_andc_2 (vectype_t *dest,
+	     vectype_t *a,
+	     vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlandc, 1 stxvp.  */
+  *dest = *a & (~ *b);
+}
+
+void
+test_orc_1 (vectype_t *dest,
+	    vectype_t *a,
+	    vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlorc, 1 stxvp.  */
+  *dest = (~ *a) | *b;
+}
+
+void
+test_orc_2 (vectype_t *dest,
+	    vectype_t *a,
+	    vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlorc, 1 stxvp.  */
+  *dest = *a | (~ *b);
+}
+
+void
+test_nand (vectype_t *dest,
+	   vectype_t *a,
+	   vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlnand, 1 stxvp.  */
+  *dest = ~(*a & *b);
+}
+
+void
+test_nor (vectype_t *dest,
+	  vectype_t *a,
+	  vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlnor, 1 stxvp.  */
+  *dest = ~(*a | *b);
+}
+
+/* { dg-final { scan-assembler-times {\mlxvp\M}     24 } } */
+/* { dg-final { scan-assembler-times {\mstxvp\M}    13 } } */
+/* { dg-final { scan-assembler-times {\mvadduhm\M}   2 } } */
+/* { dg-final { scan-assembler-times {\mvsubuhm\M}   4 } } */
+/* { dg-final { scan-assembler-times {\mxxland\M}    2 } } */
+/* { dg-final { scan-assembler-times {\mxxlandc\M}   4 } } */
+/* { dg-final { scan-assembler-times {\mxxlnand\M}   2 } } */
+/* { dg-final { scan-assembler-times {\mxxlnor\M}    4 } } */
+/* { dg-final { scan-assembler-times {\mxxlor\M}     2 } } */
+/* { dg-final { scan-assembler-times {\mxxlorc\M}    4 } } */
+/* { dg-final { scan-assembler-times {\mxxlxor\M}    2 } } */
+/* { dg-final { scan-assembler-times {\mxxspltib\M}  1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vector-size-32-6.c b/gcc/testsuite/gcc.target/powerpc/vector-size-32-6.c
new file mode 100644
index 00000000000..a905e6b0a31
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vector-size-32-6.c
@@ -0,0 +1,137 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target power10_ok } */
+/* { dg-options "-mdejagnu-cpu=power10 -O2 -mvector-size-32" } */
+
+/* Test whether the __attrbiute__((__vector_size(32))) generates paired vector
+   loads and stores with the -mvector-size-32 option.  This file tests 32-byte
+   vectors with 4 64-bit integer elements.  */
+
+typedef unsigned char vectype_t __attribute__((__vector_size__(32)));
+
+void
+test_add (vectype_t *dest,
+	  vectype_t *a,
+	  vectype_t *b)
+{
+  /* 2 lxvp, 2 vaddubm, 1 stxvp.  */
+  *dest = *a + *b;
+}
+
+void
+test_sub (vectype_t *dest,
+	  vectype_t *a,
+	  vectype_t *b)
+{
+  /* 2 lxvp, 2 vsububm, 1 stxvp.  */
+  *dest = *a - *b;
+}
+
+void
+test_negate (vectype_t *dest,
+	     vectype_t *a)
+{
+  /* 2 lxvp, 1 xxspltib, 2 vsububm, 1 stxvp.  */
+  *dest = - *a;
+}
+
+void
+test_not (vectype_t *dest,
+	  vectype_t *a)
+{
+  /* 2 lxvp, 2 xxlnor, 1 stxvp.  */
+  *dest = ~ *a;
+}
+
+void
+test_and (vectype_t *dest,
+	  vectype_t *a,
+	  vectype_t *b)
+{
+  /* 2 lxvp, 2 xxland, 1 stxvp.  */
+  *dest = *a & *b;
+}
+
+void
+test_or (vectype_t *dest,
+	 vectype_t *a,
+	 vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlor, 1 stxvp.  */
+  *dest = *a | *b;
+}
+
+void
+test_xor (vectype_t *dest,
+	  vectype_t *a,
+	  vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlxor, 1 stxvp.  */
+  *dest = *a ^ *b;
+}
+
+void
+test_andc_1 (vectype_t *dest,
+	     vectype_t *a,
+	     vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlandc, 1 stxvp.  */
+  *dest = (~ *a) & *b;
+}
+
+void
+test_andc_2 (vectype_t *dest,
+	     vectype_t *a,
+	     vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlandc, 1 stxvp.  */
+  *dest = *a & (~ *b);
+}
+
+void
+test_orc_1 (vectype_t *dest,
+	    vectype_t *a,
+	    vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlorc, 1 stxvp.  */
+  *dest = (~ *a) | *b;
+}
+
+void
+test_orc_2 (vectype_t *dest,
+	    vectype_t *a,
+	    vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlorc, 1 stxvp.  */
+  *dest = *a | (~ *b);
+}
+
+void
+test_nand (vectype_t *dest,
+	   vectype_t *a,
+	   vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlnand, 1 stxvp.  */
+  *dest = ~(*a & *b);
+}
+
+void
+test_nor (vectype_t *dest,
+	  vectype_t *a,
+	  vectype_t *b)
+{
+  /* 2 lxvp, 2 xxlnor, 1 stxvp.  */
+  *dest = ~(*a | *b);
+}
+
+/* { dg-final { scan-assembler-times {\mlxvp\M}      24 } } */
+/* { dg-final { scan-assembler-times {\mstxvp\M}     13 } } */
+/* { dg-final { scan-assembler-times {\mvaddubm\M}    2 } } */
+/* { dg-final { scan-assembler-times {\mvsububm\M}    4 } } */
+/* { dg-final { scan-assembler-times {\mxxland\M}     2 } } */
+/* { dg-final { scan-assembler-times {\mxxlandc\M}    4 } } */
+/* { dg-final { scan-assembler-times {\mxxlnand\M}    2 } } */
+/* { dg-final { scan-assembler-times {\mxxlnor\M}     4 } } */
+/* { dg-final { scan-assembler-times {\mxxlor\M}      2 } } */
+/* { dg-final { scan-assembler-times {\mxxlorc\M}     4 } } */
+/* { dg-final { scan-assembler-times {\mxxlxor\M}     2 } } */
+/* { dg-final { scan-assembler-times {\mxxspltib\M}   1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vector-size-32-7.c b/gcc/testsuite/gcc.target/powerpc/vector-size-32-7.c
new file mode 100644
index 00000000000..a6e8582ba4f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vector-size-32-7.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target power10_ok } */
+/* { dg-options "-mdejagnu-cpu=power10 -O2 -mvector-size-32" } */
+
+/* Test whether we can load vector pair constants into registers without using
+   a load instruction.  */
+
+typedef double vectype_t __attribute__((__vector_size__(32)));
+
+void
+zero (vectype_t *p)
+{
+  *p = (vectype_t) { 0.0, 0.0, 0.0, 0.0 };
+}
+
+void
+one (vectype_t *p)
+{
+  *p = (vectype_t) { 1.0, 1.0, 1.0, 1.0 };
+}
+
+void
+mixed (vectype_t *p)
+{
+  *p = (vectype_t) { 0.0, 0.0, 1.0, 1.0 };
+}
+
+/* { dg-final { scan-assembler-not   {\mp?lxvpx?\M}    } } */
+/* { dg-final { scan-assembler-times {\mp?stxvpx?\M} 3 } } */
+/* { dg-final { scan-assembler-times {\mxxspltib\M}  3 } } */
+/* { dg-final { scan-assembler-times {\mxxspltidp\M} 2 } } */
