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Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DB5PEPF00014B9D.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR08MB9948 X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, FORGED_SPF_HELO, GIT_PATCH_0, KAM_DMARC_NONE, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE, UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782745245823033617 X-GMAIL-MSGID: 1782745245823033617 This patch adjusts the mem{cpy,set} expansion in the aarch64 backend to use individual loads/stores instead of ldp/stp at expand time. The idea is to rely on the ldp fusion pass to fuse the accesses together later in the RTL pipeline. The earlier parts of the RTL pipeline should be able to do a better job with the individual (non-paired) accesses, especially given that an earlier patch in this series moves the pair representation to use unspecs. Bootstrapped/regtested as a series on aarch64-linux-gnu, OK for trunk? Thanks, Alex gcc/ChangeLog: * config/aarch64/aarch64.cc (aarch64_copy_one_block_and_progress_pointers): Emit individual accesses instead of load/store pairs. (aarch64_set_one_block_and_progress_pointer): Likewise. --- gcc/config/aarch64/aarch64.cc | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc index 1f6094bf1bc..315ba7119c0 100644 --- a/gcc/config/aarch64/aarch64.cc +++ b/gcc/config/aarch64/aarch64.cc @@ -25457,9 +25457,12 @@ aarch64_copy_one_block_and_progress_pointers (rtx *src, rtx *dst, /* "Cast" the pointers to the correct mode. */ *src = adjust_address (*src, mode, 0); *dst = adjust_address (*dst, mode, 0); - /* Emit the memcpy. */ - emit_insn (aarch64_gen_load_pair (reg1, reg2, *src)); - emit_insn (aarch64_gen_store_pair (*dst, reg1, reg2)); + /* Emit the memcpy. The load/store pair pass should form + a load/store pair from these moves. */ + emit_move_insn (reg1, *src); + emit_move_insn (reg2, aarch64_progress_pointer (*src)); + emit_move_insn (*dst, reg1); + emit_move_insn (aarch64_progress_pointer (*dst), reg2); /* Move the pointers forward. */ *src = aarch64_move_pointer (*src, 32); *dst = aarch64_move_pointer (*dst, 32); @@ -25638,7 +25641,8 @@ aarch64_set_one_block_and_progress_pointer (rtx src, rtx *dst, /* "Cast" the *dst to the correct mode. */ *dst = adjust_address (*dst, mode, 0); /* Emit the memset. */ - emit_insn (aarch64_gen_store_pair (*dst, src, src)); + emit_move_insn (*dst, src); + emit_move_insn (aarch64_progress_pointer (*dst), src); /* Move the pointers forward. */ *dst = aarch64_move_pointer (*dst, 32);