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Thu, 16 Nov 2023 07:16:29 +0000 (UTC) Received: from tucnak.zalov.cz (unknown [10.39.194.53]) by smtp.corp.redhat.com (Postfix) with ESMTPS id EDF545037; Thu, 16 Nov 2023 07:16:28 +0000 (UTC) Received: from tucnak.zalov.cz (localhost [127.0.0.1]) by tucnak.zalov.cz (8.17.1/8.17.1) with ESMTPS id 3AG7GQS02070297 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NOT); Thu, 16 Nov 2023 08:16:26 +0100 Received: (from jakub@localhost) by tucnak.zalov.cz (8.17.1/8.17.1/Submit) id 3AG7GPOH2070296; Thu, 16 Nov 2023 08:16:25 +0100 Date: Thu, 16 Nov 2023 08:16:25 +0100 From: Jakub Jelinek To: Uros Bizjak Cc: gcc-patches@gcc.gnu.org, Roger Sayle Subject: [PATCH] i386: Fix mov imm,%rax; mov %rdi,%rdx; mulx %rax -> mov imm,%rdx; mulx %rdi peephole2 [PR112526] Message-ID: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.5 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Disposition: inline X-Spam-Status: No, score=-3.4 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, KAM_SHORT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: Jakub Jelinek Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782704002984678502 X-GMAIL-MSGID: 1782704002984678502 Hi! The following testcase is miscompiled on x86_64 since PR110551 r14-4968 commit. That commit added 2 peephole2s, one for mov imm,%rXX; mov %rYY,%rax; mulq %rXX -> mov imm,%rax; mulq %rYY which I believe is ok, and another one for mov imm,%rXX; mov %rYY,%rdx; mulx %rXX, %rZZ, %rWW -> mov imm,%rdx; mulx %rYY, %rZZ, %rWW which is wrong. Both peephole2s verify that %rXX above is dead at the end of the pattern, by checking if %rXX is either one of the registers overwritten in the multiplication (%rdx:%rax in the first case, the 2 destination registers of mulx in the latter case), because we no longer set %rXX to that immediate (we set %rax resp. %rdx to it instead) when the peephole2 replaces it. But, we also need to ensure that the other register previously set to the value of %rYY and newly to imm isn't used after the multiplication, and neither of the peephole2s does that. Now, for the first one (at least assuming in the % pattern the matching operand (i.e. hardcoded %rax resp. %rdx) after RA will always go first) I think it is always the case, because operands[2] if it must be %rax register will be overwritten by mulq writing to %rdx:%rax. But in the second case, there is no reason why %rdx couldn't be used after the pattern, and if it is (like in the testcase), we can't make those changes. So, the patch checks similarly to operands[0] that operands[2] (which ought to be %rdx if RA puts the % match_dup operand first and nothing swaps it afterwards) is either the same register as one of the destination registers of mulx or dies at the end of the multiplication. Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? 2023-11-16 Jakub Jelinek PR target/112526 * config/i386/i386.md (mov imm,%rax; mov %rdi,%rdx; mulx %rax -> mov imm,%rdx; mulx %rdi): Verify in define_peephole2 that operands[2] dies or is overwritten at the end of multiplication. * gcc.target/i386/bmi2-pr112526.c: New test. Jakub --- gcc/config/i386/i386.md.jj 2023-11-14 21:38:38.667046713 +0100 +++ gcc/config/i386/i386.md 2023-11-15 17:03:28.308048728 +0100 @@ -9918,7 +9918,10 @@ (define_peephole2 && REGNO (operands[0]) != REGNO (operands[3]) && (REGNO (operands[0]) == REGNO (operands[4]) || REGNO (operands[0]) == REGNO (operands[5]) - || peep2_reg_dead_p (3, operands[0]))" + || peep2_reg_dead_p (3, operands[0])) + && (REGNO (operands[2]) == REGNO (operands[4]) + || REGNO (operands[2]) == REGNO (operands[5]) + || peep2_reg_dead_p (3, operands[2]))" [(set (match_dup 2) (match_dup 1)) (parallel [(set (match_dup 4) (mult:DWIH (match_dup 2) (match_dup 3))) --- gcc/testsuite/gcc.target/i386/bmi2-pr112526.c.jj 2023-11-15 16:58:02.230380183 +0100 +++ gcc/testsuite/gcc.target/i386/bmi2-pr112526.c 2023-11-15 17:02:22.478942259 +0100 @@ -0,0 +1,27 @@ +/* PR target/112526 */ +/* { dg-do run { target { bmi2 && int128 } } } */ +/* { dg-options "-O2 -mbmi2" } */ + +#include "bmi2-check.h" + +__attribute__((noipa)) void +foo (unsigned long x, unsigned __int128 *y, unsigned long z, unsigned long *w) +{ + register unsigned long a __asm ("%r10") = x + z; + register unsigned __int128 b __asm ("%r8") = ((unsigned __int128) a) * 257342423UL; + asm volatile ("" : "+r" (b)); + asm volatile ("" : "+d" (a)); + *y = b; + *w = a; +} + +static void +bmi2_test () +{ + unsigned __int128 y; + unsigned long w; + foo (10268318293806702989UL, &y, 4702524958196331333UL, &w); + if (y != ((((unsigned __int128) 0xc72d2c9UL) << 64) | 0x9586adfdc95b225eUL) + || w != 14970843252003034322UL) + abort (); +}