[Arm] Add neon_fcmla and neon_fcadd as neon_type instructions.
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[AArch64 folks CC'd fyi as this is common between both backends.]
Hi,
The design in the backend used to be that advanced simd types are
generally added to is_neon_type in the backend. It appears that
neon_fcmla and neon_fcadd aren't added in as neon_type instructions.
Applying this to the tree later this week after having built armhf and
a bootstrap and test run on aarch64-linux-gnu.
Thanks,
Ramana
commit 7dd15fae0ac1455f5818a1fc0078e35d85e1e250
Author: Ramana Radhakrishnan <ramana.gcc@gmail.com>
Date: Wed Nov 16 10:32:04 2022 +0000
[Patch Arm] Add neon_fcadd and neon_fcmla to is_neon_type.
Appears to have been an oversight.
gcc/
* config/arm/types.md: Update comment.
(is_neon_type): Add neon_fcmla, neon_fcadd.
Signed-off-by: Ramana Radhakrishnan <ramana.gcc@gmail.com>
@@ -248,7 +248,8 @@ (define_attr "autodetect_type"
; wmmx_wunpckil
; wmmx_wxor
;
-; The classification below is for NEON instructions.
+; The classification below is for NEON instructions. If a new neon type is
+; added, please ensure this is added to the is_neon_type attribute below too.
;
; neon_add
; neon_add_q
@@ -1281,6 +1282,7 @@ (define_attr "is_neon_type" "yes,no"
neon_fp_mla_d_q, neon_fp_mla_d_scalar_q, neon_fp_sqrt_s,\
neon_fp_sqrt_s_q, neon_fp_sqrt_d, neon_fp_sqrt_d_q,\
neon_fp_div_s, neon_fp_div_s_q, neon_fp_div_d, neon_fp_div_d_q, crypto_aese,\
+ neon_fcadd, neon_fcmla, \
crypto_aesmc, crypto_sha1_xor, crypto_sha1_fast, crypto_sha1_slow,\
crypto_sha256_fast, crypto_sha256_slow")
(const_string "yes")