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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id u24-20020a17090626d800b0094f5a1fb049si1613571ejc.583.2023.04.20.08.04.47 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Apr 2023 08:04:47 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=SFFp1KaM; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 1A7B23857714 for ; Thu, 20 Apr 2023 15:04:46 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1A7B23857714 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1682003086; bh=eWCXt23OgYmOqcQs3SUdWd6OOcDR6EDFpczHPk3ODqk=; h=Date:Subject:To:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=SFFp1KaMd6iGl9PBqQLz4k+qIK2w4mwi6nhxoYTsw/99JCypDgSNXG/tTM2qt6swI Xsh7OXSrloFZgrtTYaZwWkUYal61wskH6SAnVOAR9I22IbahqtRSGj1DoekswWPxGZ lin2vuCj1E5kfSBv8qsbrWHAetwXZBNUyizbqp6k= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-qk1-x736.google.com (mail-qk1-x736.google.com [IPv6:2607:f8b0:4864:20::736]) by sourceware.org (Postfix) with ESMTPS id 796943858D37 for ; Thu, 20 Apr 2023 15:04:00 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 796943858D37 Received: by mail-qk1-x736.google.com with SMTP id af79cd13be357-74a9053c0cdso83514685a.2 for ; Thu, 20 Apr 2023 08:04:00 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682003039; x=1684595039; h=to:subject:message-id:date:from:mime-version:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=eWCXt23OgYmOqcQs3SUdWd6OOcDR6EDFpczHPk3ODqk=; b=k+ZxWlbnvMJFniVdgqYACx423kYbXyK3nzid3ie+p7twLzJEUGs1y79S8r/McmcwYs CXlwtYATrhmbs+ZWgudwiDxAtgiCLAHb75YfcDb6OkxReVyyIWkq0RaC2lpESNw8DVTJ L1XKBUzZj+5Ta3AOkzQvvSQGnETSmSb/ISz56gXPNgrMkwr8dzhr01mSUrXPih1Zuely OMUizW7s3isUqCcmMgfamBaBfwaGXzzg2mT1V68kp5aAp4UMBmikEPGNaeohrvu0GPIA Yw5erujkPyUKfpxV67tL+GW7Eg86MSlvH5C3lSZ0Dz79Kp9kjMm7PRM5vQ3MPOkdq/ls wkug== X-Gm-Message-State: AAQBX9fb0AKXbepTvEOWY0VmGLEU97OgBCCHrSVMaxtO52mUjVyu/gDH Z9EXbDNWhqey4jnxQzE9Upa9rGnC5De3uNnpAZZqKALtfRNglQ== X-Received: by 2002:a05:6214:2a4e:b0:5ef:6f81:6e with SMTP id jf14-20020a0562142a4e00b005ef6f81006emr3334058qvb.18.1682003039341; Thu, 20 Apr 2023 08:03:59 -0700 (PDT) MIME-Version: 1.0 Date: Thu, 20 Apr 2023 17:03:48 +0200 Message-ID: Subject: [PATCH] arch: Use VIRTUAL_REGISTER_P predicate. To: "gcc-patches@gcc.gnu.org" X-Spam-Status: No, score=-8.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Uros Bizjak via Gcc-patches From: Uros Bizjak Reply-To: Uros Bizjak Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1763708069445663391?= X-GMAIL-MSGID: =?utf-8?q?1763708069445663391?= gcc/ChangeLog: * config/arm/arm.cc (thumb1_legitimate_address_p): Use VIRTUAL_REGISTER_P predicate. (arm_eliminable_register): Ditto. * config/avr/avr.md (push_1): Ditto. * config/bfin/predicates.md (register_no_elim_operand): Ditto. * config/h8300/predicates.md (register_no_sp_elim_operand): Ditto. * config/i386/predicates.md (register_no_elim_operand): Ditto. * config/iq2000/predicates.md (call_insn_operand): Ditto. * config/microblaze/microblaze.h (CALL_INSN_OP): Ditto. Tested by building cc1 and compiling a hello-world.c application for all affected arches. Pushed to master as an obvious patch. Uros. diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc index bf7ff9a9704..1164119a300 100644 --- a/gcc/config/arm/arm.cc +++ b/gcc/config/arm/arm.cc @@ -9105,9 +9105,7 @@ thumb1_legitimate_address_p (machine_mode mode, rtx x, int strict_p) else if (REG_P (XEXP (x, 0)) && (REGNO (XEXP (x, 0)) == FRAME_POINTER_REGNUM || REGNO (XEXP (x, 0)) == ARG_POINTER_REGNUM - || (REGNO (XEXP (x, 0)) >= FIRST_VIRTUAL_REGISTER - && REGNO (XEXP (x, 0)) - <= LAST_VIRTUAL_POINTER_REGISTER)) + || VIRTUAL_REGISTER_P (XEXP (x, 0))) && GET_MODE_SIZE (mode) >= 4 && CONST_INT_P (XEXP (x, 1)) && (INTVAL (XEXP (x, 1)) & 3) == 0) @@ -13905,8 +13903,7 @@ arm_eliminable_register (rtx x) { return REG_P (x) && (REGNO (x) == FRAME_POINTER_REGNUM || REGNO (x) == ARG_POINTER_REGNUM - || (REGNO (x) >= FIRST_VIRTUAL_REGISTER - && REGNO (x) <= LAST_VIRTUAL_REGISTER)); + || VIRTUAL_REGISTER_P (x)); } /* Return GENERAL_REGS if a scratch register required to reload x to/from diff --git a/gcc/config/avr/avr.md b/gcc/config/avr/avr.md index e581e959e57..43b75046384 100644 --- a/gcc/config/avr/avr.md +++ b/gcc/config/avr/avr.md @@ -417,8 +417,7 @@ (define_expand "push1" operands[0] = copy_to_mode_reg (mode, operands[0]); } else if (REG_P (operands[0]) - && IN_RANGE (REGNO (operands[0]), FIRST_VIRTUAL_REGISTER, - LAST_VIRTUAL_REGISTER)) + && VIRTUAL_REGISTER_P (operands[0])) { // Byte-wise pushing of virtual regs might result in something like // diff --git a/gcc/config/bfin/predicates.md b/gcc/config/bfin/predicates.md index 09ec5a4bd86..632634eb0f7 100644 --- a/gcc/config/bfin/predicates.md +++ b/gcc/config/bfin/predicates.md @@ -175,7 +175,7 @@ (define_predicate "symbolic_or_const_operand" (define_predicate "symbol_ref_operand" (match_code "symbol_ref")) -;; True for any non-virtual or eliminable register. Used in places where +;; True for any non-virtual and non-eliminable register. Used in places where ;; instantiation of such a register may cause the pattern to not be recognized. (define_predicate "register_no_elim_operand" (match_operand 0 "register_operand") @@ -184,8 +184,7 @@ (define_predicate "register_no_elim_operand" op = SUBREG_REG (op); return !(op == arg_pointer_rtx || op == frame_pointer_rtx - || (REGNO (op) >= FIRST_PSEUDO_REGISTER - && REGNO (op) <= LAST_VIRTUAL_REGISTER)); + || VIRTUAL_REGISTER_P (op)); }) ;; Test for an operator valid in a BImode conditional branch diff --git a/gcc/config/h8300/predicates.md b/gcc/config/h8300/predicates.md index 02da8aa413a..486c4d7ce66 100644 --- a/gcc/config/h8300/predicates.md +++ b/gcc/config/h8300/predicates.md @@ -378,8 +378,7 @@ (define_predicate "register_no_sp_elim_operand" return !(op == stack_pointer_rtx || op == arg_pointer_rtx || op == frame_pointer_rtx - || IN_RANGE (REGNO (op), - FIRST_PSEUDO_REGISTER, LAST_VIRTUAL_REGISTER)); + || VIRTUAL_REGISTER_P (op)); }) ;; Return nonzero if X is a constant whose absolute value is greater diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md index b4d9ab40ab9..746101a1755 100644 --- a/gcc/config/i386/predicates.md +++ b/gcc/config/i386/predicates.md @@ -702,7 +702,7 @@ (define_predicate "call_register_no_elim_operand" return register_no_elim_operand (op, mode); }) -;; True for any non-virtual or eliminable register. Used in places where +;; True for any non-virtual and non-eliminable register. Used in places where ;; instantiation of such a register may cause the pattern to not be recognized. (define_predicate "register_no_elim_operand" (match_operand 0 "register_operand") @@ -717,8 +717,7 @@ (define_predicate "register_no_elim_operand" return !(op == arg_pointer_rtx || op == frame_pointer_rtx - || IN_RANGE (REGNO (op), - FIRST_PSEUDO_REGISTER, LAST_VIRTUAL_REGISTER)); + || VIRTUAL_REGISTER_P (op)); }) ;; Similarly, but include the stack pointer. This is used to prevent esp diff --git a/gcc/config/iq2000/predicates.md b/gcc/config/iq2000/predicates.md index 4adc108df46..1330f7d613c 100644 --- a/gcc/config/iq2000/predicates.md +++ b/gcc/config/iq2000/predicates.md @@ -206,8 +206,7 @@ (define_predicate "call_insn_operand" { return (CONSTANT_ADDRESS_P (op) || (GET_CODE (op) == REG && op != arg_pointer_rtx - && ! (REGNO (op) >= FIRST_PSEUDO_REGISTER - && REGNO (op) <= LAST_VIRTUAL_REGISTER))); + && ! VIRTUAL_REGISTER_P (op))); }) ;; Return nonzero if OP is valid as a source operand for a move diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h index 0398902362b..8a0e1a76adf 100644 --- a/gcc/config/microblaze/microblaze.h +++ b/gcc/config/microblaze/microblaze.h @@ -372,9 +372,8 @@ extern enum reg_class microblaze_regno_to_class[]; since they may change into reg + const, which the patterns can't handle yet. */ #define CALL_INSN_OP(X) (CONSTANT_ADDRESS_P (X) \ - || (GET_CODE (X) == REG && X != arg_pointer_rtx\ - && ! (REGNO (X) >= FIRST_PSEUDO_REGISTER \ - && REGNO (X) <= LAST_VIRTUAL_REGISTER))) + || (GET_CODE (X) == REG && X != arg_pointer_rtx \ + && ! VIRTUAL_REGISTER_P (X))) /* True if VALUE is a signed 16-bit number. */ #define SMALL_OPERAND(VALUE) \