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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id he30-20020a1709073d9e00b009576377c402si27117740ejc.924.2023.05.04.04.05.26 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 04 May 2023 04:05:26 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=cWIin5vt; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 44985385703C for ; Thu, 4 May 2023 11:05:25 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 44985385703C DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1683198325; bh=XfJibiip+17bnjl004SHKuMc/CDnfYNFGqOWcB5C1hU=; h=Date:Subject:To:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=cWIin5vtXTtQGp1GGnqKAABGYV6p/3TdkxZWbGbAmzuQWyHg6lDAMwUYGtAg/3pL3 +S6tpr3OnWbrRtEV5PfZdDzcfaOpoWFjGvUNC9K1U+PMKTbHIKgQZbtNWRJtpvepiP GN5lBtwR2IdltQnUFNpXpqy82uwpFQ0Dq6v4OOpc= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-qv1-xf2f.google.com (mail-qv1-xf2f.google.com [IPv6:2607:f8b0:4864:20::f2f]) by sourceware.org (Postfix) with ESMTPS id 39C4A3857735 for ; Thu, 4 May 2023 11:04:41 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 39C4A3857735 Received: by mail-qv1-xf2f.google.com with SMTP id 6a1803df08f44-61b79b93ac5so1492766d6.0 for ; Thu, 04 May 2023 04:04:41 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683198280; x=1685790280; h=to:subject:message-id:date:from:mime-version:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=XfJibiip+17bnjl004SHKuMc/CDnfYNFGqOWcB5C1hU=; b=d9uawLPThkx6Ln3ul4Y1pPyfJiLQMSo5BVkMEuHt4khWxsfOnZI/Htu/zTAWdg5Mkj dkY5U+Te6Rcx5vlIXD/7JzHWME28GOGpAiAbVxLKwMlzJyFPEtgsg+jrrUBnHDMpIyaq +xMWJS1BulEn3OTwyCGHaNjvcIgIRUQJ4myhSUeV8wARsZbGNZV+AdjggerkEieKJF1N GSigQwx+CAPU2bzHdaPRYsiZ+oEFkQZEDaDJCsr0lAUFA4UZve/gXLtYSd4w4ClKpg3R EZoqi7ve+KwWA59Tg8nfr+lMtNKTpbjvVNHi65upqew/Y92aq6yCXP6IbyZxa+4m23on 9/0A== X-Gm-Message-State: AC+VfDyefRv32C6U2RT5hC53JfdmT1OLAnezZSSUborv3ZqxXGhk2yAJ cq/RiNpHiPyH3w+VbRTeZ0/q8tGrwQz6pToBnx1Lvx/NRit3T+7c X-Received: by 2002:ad4:5ced:0:b0:61b:5a46:11fd with SMTP id iv13-20020ad45ced000000b0061b5a4611fdmr15415351qvb.36.1683198280158; Thu, 04 May 2023 04:04:40 -0700 (PDT) MIME-Version: 1.0 Date: Thu, 4 May 2023 13:04:28 +0200 Message-ID: Subject: [PATCH] i386: Improve index_register_operand predicate To: "gcc-patches@gcc.gnu.org" X-Spam-Status: No, score=-7.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Uros Bizjak via Gcc-patches From: Uros Bizjak Reply-To: Uros Bizjak Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764961368268642614?= X-GMAIL-MSGID: =?utf-8?q?1764961368268642614?= Use the same approach as in register_no_elim_operand predicate, but also reject stack_pointer_rtx operands. gcc/ChangeLog: * config/i386/predicates.md (index_register_operand): Reject arg_pointer_rtx, frame_pointer_rtx, stack_pointer_rtx and VIRTUAL_REGISTER_P operands. Allow subregs of memory before reload. (call_register_no_elim_operand): Rewrite as ... (call_register_operand): ... this. (call_insn_operand): Use call_register_operand predicate. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Pushed to master. Uros. diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md index 91400d7d8fb..878b144b0fb 100644 --- a/gcc/config/i386/predicates.md +++ b/gcc/config/i386/predicates.md @@ -686,22 +686,6 @@ (define_predicate "constant_call_address_operand" return true; }) -;; P6 processors will jump to the address after the decrement when %esp -;; is used as a call operand, so they will execute return address as a code. -;; See Pentium Pro errata 70, Pentium 2 errata A33 and Pentium 3 errata E17. - -(define_predicate "call_register_no_elim_operand" - (match_operand 0 "register_operand") -{ - if (SUBREG_P (op)) - op = SUBREG_REG (op); - - if (!TARGET_64BIT && op == stack_pointer_rtx) - return false; - - return register_no_elim_operand (op, mode); -}) - ;; True for any non-virtual and non-eliminable register. Used in places where ;; instantiation of such a register may cause the pattern to not be recognized. (define_predicate "register_no_elim_operand" @@ -720,21 +704,34 @@ (define_predicate "register_no_elim_operand" || VIRTUAL_REGISTER_P (op)); }) -;; Similarly, but include the stack pointer. This is used to prevent esp -;; from being used as an index reg. +;; Similarly, but include the stack pointer. This is used +;; to prevent esp from being used as an index reg. (define_predicate "index_register_operand" (match_operand 0 "register_operand") { if (SUBREG_P (op)) op = SUBREG_REG (op); - unsigned int regno = REGNO (op); - if (reload_completed) - return REGNO_OK_FOR_INDEX_P (regno); - else - return REGNO_OK_FOR_INDEX_NONSTRICT_P (regno); + /* Before reload, we can allow (SUBREG (MEM...)) as a register operand + because it is guaranteed to be reloaded into one. */ + if (MEM_P (op)) + return true; + + return !(op == arg_pointer_rtx + || op == frame_pointer_rtx + || op == stack_pointer_rtx + || VIRTUAL_REGISTER_P (op)); }) +;; P6 processors will jump to the address after the decrement when %esp +;; is used as a call operand, so they will execute return address as a code. +;; See Pentium Pro errata 70, Pentium 2 errata A33 and Pentium 3 errata E17. + +(define_predicate "call_register_operand" + (if_then_else (match_test "TARGET_64BIT") + (match_operand 0 "register_operand") + (match_operand 0 "index_register_operand"))) + ;; Return false if this is any eliminable register. Otherwise general_operand. (define_predicate "general_no_elim_operand" (if_then_else (match_code "reg,subreg") @@ -790,7 +787,7 @@ (define_predicate "GOT_memory_operand" (define_special_predicate "call_insn_operand" (ior (match_test "constant_call_address_operand (op, mode == VOIDmode ? mode : Pmode)") - (match_operand 0 "call_register_no_elim_operand") + (match_operand 0 "call_register_operand") (and (not (match_test "TARGET_INDIRECT_BRANCH_REGISTER")) (ior (and (not (match_test "TARGET_X32")) (match_operand 0 "memory_operand"))