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bh=FZC5BBHdLSvRXSRjlpnR0dNBsc2HS350Qd7s163AQ/A=; b=ckabx/Ay4PeYaDaenRnMI2tNsbOT6jy7MA7yJPG/4kR8Ul83ntGrgY0pj/dLnrQu1j aLRpD4qe5JK96a8SfsrxGpCaU2g2ZzT1Ph2WBDltY/RhncEPOAXVvs1UIzIRzqtdqa5d 4g/8gUF/X9PZaIKT+nniqtAYSrQKdEDqmGrOtkH/6QmqCJWdXp2gbp5BF6/5ter3PKTr Nxc9Wyq2ruonYQaqPDQYpi6AYVqBhwvEfh6OkZemIi10ahZ+3JmvRE4lEnKlBMZ1DAJ3 NYjpMMOqScYrbDm6nvQ+hpS1U2msl1Znel6LdgsY1IebNjpdWhSaIOQMYiRRTYX/jMkx iiXQ== X-Gm-Message-State: AOJu0YwTq8TPHuu2jROZjWg5o4P/00k0qyMgiGx4xKGTdcmlycTJLDxr i9teuBRWkiGteGUeq3fHetKJovPvM7HmwJ8zu2DGec4vBL0V+Y4jI+pKMwHndcNkO9qZs9L+ZTN MKZtP4E9llAQfFONrW1MhIsQJot6yNn2sRHw= X-Received: by 2002:a2e:97d5:0:b0:2d2:d32b:dabf with SMTP id m21-20020a2e97d5000000b002d2d32bdabfmr4866884ljj.22.1709495021972; Sun, 03 Mar 2024 11:43:41 -0800 (PST) MIME-Version: 1.0 From: Uros Bizjak Date: Sun, 3 Mar 2024 20:43:30 +0100 Message-ID: Subject: [committed] alpha: Introduce UMUL_HIGHPART rtx_code [PR113720] To: "gcc-patches@gcc.gnu.org" X-Spam-Status: No, score=-7.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1792535497553043123 X-GMAIL-MSGID: 1792535497553043123 umuldi3_highpart expander does: if (REG_P (operands[2])) operands[2] = gen_rtx_ZERO_EXTEND (TImode, operands[2]); on register_operand predicate, which also allows SUBREG RTX. So, subregs were emitted without ZERO_EXTEND RTX. But nowadays we have UMUL_HIGHPART that allows us to fix this issue while also simplifying the instruction RTX. PR target/113720 gcc/ChangeLog: * config/alpha/alpha.md (umuldi3_highpart): Remove expander. (*umuldi3_highpart_reg): Rename to umuldi3_highpart and simplify insn RTX using UMUL_HIGHPART rtx_code. (*umuldi3_highpart_const): Remove. Tested by building a cross-compiler to alpha-linux-gnu. Uros. diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md index 94d5d339c3d..79f12c53c16 100644 --- a/gcc/config/alpha/alpha.md +++ b/gcc/config/alpha/alpha.md @@ -683,41 +683,10 @@ (define_insn "mulv3" [(set_attr "type" "imul") (set_attr "opsize" "")]) -(define_expand "umuldi3_highpart" - [(set (match_operand:DI 0 "register_operand") - (truncate:DI - (lshiftrt:TI - (mult:TI (zero_extend:TI - (match_operand:DI 1 "register_operand")) - (match_operand:DI 2 "reg_or_8bit_operand")) - (const_int 64))))] - "" -{ - if (REG_P (operands[2])) - operands[2] = gen_rtx_ZERO_EXTEND (TImode, operands[2]); -}) - -(define_insn "*umuldi3_highpart_reg" - [(set (match_operand:DI 0 "register_operand" "=r") - (truncate:DI - (lshiftrt:TI - (mult:TI (zero_extend:TI - (match_operand:DI 1 "register_operand" "r")) - (zero_extend:TI - (match_operand:DI 2 "register_operand" "r"))) - (const_int 64))))] - "" - "umulh %1,%2,%0" - [(set_attr "type" "imul") - (set_attr "opsize" "udi")]) - -(define_insn "*umuldi3_highpart_const" +(define_insn "umuldi3_highpart" [(set (match_operand:DI 0 "register_operand" "=r") - (truncate:DI - (lshiftrt:TI - (mult:TI (zero_extend:TI (match_operand:DI 1 "register_operand" "r")) - (match_operand:TI 2 "cint8_operand" "I")) - (const_int 64))))] + (umul_highpart:DI (match_operand:DI 1 "reg_or_0_operand" "%rJ") + (match_operand:DI 2 "reg_or_8bit_operand" "rI")))] "" "umulh %1,%2,%0" [(set_attr "type" "imul")