[committed] i386: Micro-optimize ix86_expand_sse_extend
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Commit Message
Partial vector src is forced to a register as ops[1], we can use it
instead of SRC in the call to ix86_expand_sse_cmp. This change avoids
forcing operand[1] to a register in sign/zero-extend expanders.
gcc/ChangeLog:
* config/i386/i386-expand.cc (ix86_expand_sse_extend): Use ops[1]
instead of src in the call to ix86_expand_sse_cmp.
* config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Do not
force operands[1] to a register.
(<any_extend:insn>v4hiv4si2): Ditto.
(<any_extend:insn>v2siv2di2): Ditto.
Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.
Uros.
@@ -5667,7 +5667,7 @@ ix86_expand_sse_extend (rtx dest, rtx src, bool unsigned_p)
ops[2] = force_reg (imode, CONST0_RTX (imode));
else
ops[2] = ix86_expand_sse_cmp (gen_reg_rtx (imode), GT, CONST0_RTX (imode),
- src, pc_rtx, pc_rtx);
+ ops[1], pc_rtx, pc_rtx);
ix86_split_mmx_punpck (ops, false);
emit_move_insn (dest, lowpart_subreg (GET_MODE (dest), ops[0], imode));
@@ -22923,8 +22923,7 @@ (define_expand "<insn>v8qiv8hi2"
{
if (!TARGET_SSE4_1)
{
- rtx op1 = force_reg (V8QImode, operands[1]);
- ix86_expand_sse_extend (operands[0], op1, <u_bool>);
+ ix86_expand_sse_extend (operands[0], operands[1], <u_bool>);
DONE;
}
@@ -23240,8 +23239,7 @@ (define_expand "<insn>v4hiv4si2"
{
if (!TARGET_SSE4_1)
{
- rtx op1 = force_reg (V4HImode, operands[1]);
- ix86_expand_sse_extend (operands[0], op1, <u_bool>);
+ ix86_expand_sse_extend (operands[0], operands[1], <u_bool>);
DONE;
}
@@ -23846,8 +23844,7 @@ (define_expand "<insn>v2siv2di2"
{
if (!TARGET_SSE4_1)
{
- rtx op1 = force_reg (V2SImode, operands[1]);
- ix86_expand_sse_extend (operands[0], op1, <u_bool>);
+ ix86_expand_sse_extend (operands[0], operands[1], <u_bool>);
DONE;
}