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Fri, 2 Jun 2023 09:53:59 +0000 To: CC: Subject: [PATCH, PR110086] avr: Fix ICE on optimize attribute Thread-Topic: [PATCH, PR110086] avr: Fix ICE on optimize attribute Thread-Index: AQHZlTgn6gb+iNnBnEqtZruGgO+3mA== Date: Fri, 2 Jun 2023 09:53:59 +0000 Message-ID: <9ff071e705550749d0d05e4adabd0ba0f07e8f45.camel@microchip.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: user-agent: Evolution 3.36.5-0ubuntu1 x-ms-publictraffictype: Email x-ms-traffictypediagnostic: BN6PR11MB1892:EE_|BL3PR11MB6484:EE_ x-ms-office365-filtering-correlation-id: 809e1d28-3c26-4044-c55e-08db634f49b2 x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: k+392HTQKYyeS/XCTBs0z92vLs9EuBjPkJdc5LpN45QN3FkD+ENdf4Nbd/pvQCW1k+8H7Khvy6Z+TBqeFNHsyZE1D9tBpOquYgHmfCranT6Sq1+I4H5oyc406z6VQVxL2wraghv219rAffS8OhY69BLjneDhBfbwGUKHmyPpRx9Eaf8iv6qqL5nuUAeMNMskzE8LB8dp29myLUfrpqvZSLS3siW1khO+iEWyUUtN8gTH+HlTZ/1ubd0Z1HBbHDOSDJXsmYGDxFGTOGUxkH0sIYI99wBHKszCMWB9ivt0wHdkjZbbNh7U7l/wGFHiY5RQMmkX7HtEJSNesnKwPhRQWjcC9nBY4uM3AmlFHvVWEkj14ahY1TlMsEr0r371Axi9awOdI4EyDfHBvQHkEVULwymGFAleVV+QXkX4IWALsHHXYBwq5V08o1//D/Bat7arbeHaR/muJxda1/+/RePtNoYNgUC5mfprV4LfEgMX7belRlmAF0jUakXBuZUB5yZ6WEWAXWnluaz30hR/65kVS9nmGtSpKJ5B4PiYVLFGGQp7KCBlnux17Uk6sGSap2QkWwfGX6iGfgyJYXMD2eypOLK6oZV6o6Xv7IBLPYbXwVA= x-forefront-antispam-report: CIP:255.255.255.255; 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I found https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105069 describing the same ICE for the sh target, where the fix was to enable save/restore of target specific options modified via TARGET_OPTIMIZATION_TABLE hook. For the AVR target, mgas-isr-prologues and -mmain-is-OS_task are those target specific options. As they enable generation of more optimal code, this patch adds the Optimization option property to those option records, and that fixes the ICE. Regression run shows no regressions, and >100 new PASSes. Ok to commit to master? Regards Senthil PR 110086 gcc/ChangeLog: * config/avr/avr.opt (mgas-isr-prologues, mmain-is-OS_task): Add Optimization option property. gcc/testsuite/ChangeLog: * gcc.target/avr/pr110086.c: New test. diff --git gcc/config/avr/avr.opt gcc/config/avr/avr.opt index f62d746..5a0b465 100644 --- gcc/config/avr/avr.opt +++ gcc/config/avr/avr.opt @@ -27,7 +27,7 @@ Target RejectNegative Joined Var(avr_mmcu) MissingArgError(missing device or arc -mmcu=MCU Select the target MCU. mgas-isr-prologues -Target Var(avr_gasisr_prologues) UInteger Init(0) +Target Var(avr_gasisr_prologues) UInteger Init(0) Optimization Allow usage of __gcc_isr pseudo instructions in ISR prologues and epilogues. mn-flash= @@ -65,7 +65,7 @@ Target Joined RejectNegative UInteger Var(avr_branch_cost) Init(0) Set the branch costs for conditional branch instructions. Reasonable values are small, non-negative integers. The default branch cost is 0. mmain-is-OS_task -Target Mask(MAIN_IS_OS_TASK) +Target Mask(MAIN_IS_OS_TASK) Optimization Treat main as if it had attribute OS_task. morder1 diff --git gcc/testsuite/gcc.target/avr/pr110086.c gcc/testsuite/gcc.target/avr/pr110086.c new file mode 100644 index 0000000..6b97620 --- /dev/null +++ gcc/testsuite/gcc.target/avr/pr110086.c @@ -0,0 +1,5 @@ +/* { dg-do compile } */ +/* { dg-options "-Os" } */ + +void __attribute__((optimize("O0"))) foo(void) { +}