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Wed, 6 Dec 2023 08:13:49 +0000 (GMT) Received: from smtpav01.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1AE122005A; Wed, 6 Dec 2023 08:13:48 +0000 (GMT) Received: from [9.200.103.64] (unknown [9.200.103.64]) by smtpav01.fra02v.mail.ibm.com (Postfix) with ESMTP; Wed, 6 Dec 2023 08:13:47 +0000 (GMT) Message-ID: <98d7470f-4017-4d46-81d1-3b9eb231da7f@linux.ibm.com> Date: Wed, 6 Dec 2023 16:13:49 +0800 User-Agent: Mozilla Thunderbird Content-Language: en-US To: gcc-patches Cc: Segher Boessenkool , David , "Kewen.Lin" , Peter Bergner From: HAO CHEN GUI Subject: [patch-2v2, rs6000] guard fctid on PPC64 and powerpc 476 [PR112707] X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: zf9WEuiHMpKyvEwczO6SuhHfQPCWDuMb X-Proofpoint-GUID: YnJAP8QM4fy3WAzLvgRaZ4ifdUesD6Cf X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-06_06,2023-12-05_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 impostorscore=0 phishscore=0 clxscore=1015 adultscore=0 malwarescore=0 mlxlogscore=999 bulkscore=0 lowpriorityscore=0 suspectscore=0 priorityscore=1501 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2312060065 X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784519549812251986 X-GMAIL-MSGID: 1784519549812251986 Hi, The "fctid" is supported on 64-bit Power processors and powerpc 476. It need a guard to check it. The patch fixes the issue. Compared with last version, https://gcc.gnu.org/pipermail/gcc-patches/2023-December/638859.html the main change is to define TARGET_FCTID to POWERPC64 or PPC476. Also guard "lrintdi2" by TARGET_FCTID as it generates fctid. Bootstrapped and tested on x86 and powerpc64-linux BE and LE with no regressions. Is this OK for trunk? Thanks Gui Haochen ChangeLog rs6000: guard fctid on PPC64 and powerpc 476. fctid is supported on 64-bit Power processors and powerpc 476. It should be guarded by this condition. The patch fixes the issue. gcc/ PR target/112707 * config/rs6000/rs6000.h (TARGET_FCTID): Define. * config/rs6000/rs6000.md (lrintdi2): Add guard TARGET_FCTID. * (lrounddi2): Replace TARGET_FPRND with TARGET_FCTID. gcc/testsuite/ PR target/112707 * gcc.target/powerpc/pr112707.h: New. * gcc.target/powerpc/pr112707-2.c: New. * gcc.target/powerpc/pr112707-3.c: New. * gcc.target/powerpc/pr88558-p7.c: Remove fctid for ilp32 as it's now guarded by powerpc64. * gcc.target/powerpc/pr88558-p8.c: Likewise. * gfortran.dg/nint_p7.f90: Add powerpc64 target requirement as lrounddi2 is now guarded by powerpc64. patch.diff diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 22595f6ebd7..8c29ca68ccf 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -467,6 +467,8 @@ extern int rs6000_vector_align[]; #define TARGET_FCFIDUS TARGET_POPCNTD #define TARGET_FCTIDUZ TARGET_POPCNTD #define TARGET_FCTIWUZ TARGET_POPCNTD +/* Enable fctid on ppc64 and powerpc476. */ +#define TARGET_FCTID (TARGET_POWERPC64 || rs6000_cpu == PROCESSOR_PPC476) #define TARGET_CTZ TARGET_MODULO #define TARGET_EXTSWSLI (TARGET_MODULO && TARGET_POWERPC64) #define TARGET_MADDLD TARGET_MODULO diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 2a1b5ecfaee..3be79d49dc0 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -6718,7 +6718,7 @@ (define_insn "lrintdi2" [(set (match_operand:DI 0 "gpc_reg_operand" "=d") (unspec:DI [(match_operand:SFDF 1 "gpc_reg_operand" "")] UNSPEC_FCTID))] - "TARGET_HARD_FLOAT" + "TARGET_HARD_FLOAT && TARGET_FCTID" "fctid %0,%1" [(set_attr "type" "fp")]) @@ -6784,7 +6784,7 @@ (define_expand "lrounddi2" (set (match_operand:DI 0 "gpc_reg_operand") (unspec:DI [(match_dup 2)] UNSPEC_FCTID))] - "TARGET_HARD_FLOAT && TARGET_VSX && TARGET_FPRND" + "TARGET_HARD_FLOAT && TARGET_VSX && TARGET_FCTID" { operands[2] = gen_reg_rtx (mode); }) diff --git a/gcc/testsuite/gcc.target/powerpc/pr112707-2.c b/gcc/testsuite/gcc.target/powerpc/pr112707-2.c new file mode 100644 index 00000000000..672e00691ea --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr112707-2.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mdejagnu-cpu=7450 -fno-math-errno" } */ +/* { dg-require-effective-target ilp32 } */ +/* { dg-skip-if "" { has_arch_ppc64 } } */ +/* { dg-final { scan-assembler-not {\mfctid\M} } } */ + +/* powerpc 7450 doesn't support ppc64 (-m32 -mpowerpc64), so skips it. */ + +#include "pr112707.h" diff --git a/gcc/testsuite/gcc.target/powerpc/pr112707-3.c b/gcc/testsuite/gcc.target/powerpc/pr112707-3.c new file mode 100644 index 00000000000..924338fd390 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr112707-3.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fno-math-errno -mdejagnu-cpu=476fp" } */ +/* { dg-require-effective-target ilp32 } */ + +/* powerpc 476fp has hard float enabled which is required by fctid */ + +#include "pr112707.h" + +/* { dg-final { scan-assembler-times {\mfctid\M} 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr112707.h b/gcc/testsuite/gcc.target/powerpc/pr112707.h new file mode 100644 index 00000000000..e427dc6a72e --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr112707.h @@ -0,0 +1,10 @@ +long long test1 (double a) +{ + return __builtin_llrint (a); +} + +long long test2 (float a) +{ + return __builtin_llrint (a); +} + diff --git a/gcc/testsuite/gcc.target/powerpc/pr88558-p7.c b/gcc/testsuite/gcc.target/powerpc/pr88558-p7.c index 3932656c5fd..13d433c4bdb 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr88558-p7.c +++ b/gcc/testsuite/gcc.target/powerpc/pr88558-p7.c @@ -6,7 +6,6 @@ #include "pr88558.h" /* { dg-final { scan-assembler-times {\mfctid\M} 4 { target lp64 } } } */ -/* { dg-final { scan-assembler-times {\mfctid\M} 2 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mfctiw\M} 2 { target lp64 } } } */ /* { dg-final { scan-assembler-times {\mfctiw\M} 4 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mstfiwx\M} 2 { target lp64 } } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr88558-p8.c b/gcc/testsuite/gcc.target/powerpc/pr88558-p8.c index 1afc8fd4f0d..0744e5d2346 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr88558-p8.c +++ b/gcc/testsuite/gcc.target/powerpc/pr88558-p8.c @@ -7,7 +7,6 @@ #include "pr88558.h" /* { dg-final { scan-assembler-times {\mfctid\M} 4 { target lp64 } } } */ -/* { dg-final { scan-assembler-times {\mfctid\M} 2 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mfctiw\M} 2 { target lp64 } } } */ /* { dg-final { scan-assembler-times {\mfctiw\M} 4 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mmfvsrwz\M} 2 { target lp64 } } } */ diff --git a/gcc/testsuite/gfortran.dg/nint_p7.f90 b/gcc/testsuite/gfortran.dg/nint_p7.f90 index 2239824a7fb..c23eb6783bc 100644 --- a/gcc/testsuite/gfortran.dg/nint_p7.f90 +++ b/gcc/testsuite/gfortran.dg/nint_p7.f90 @@ -2,6 +2,7 @@ ! { dg-do compile { target { powerpc*-*-* } } } ! { dg-require-effective-target powerpc_vsx_ok } ! { dg-options "-O2 -mdejagnu-cpu=power7 -ffast-math" } +! { dg-require-effective-target has_arch_ppc64 } ! { dg-final { scan-assembler-times "xsrdpi" 2 } } subroutine test_nint(x4,x8)