Update 'gcc.dg/vect/vect-simd-clone-*.c' GCN 'dg-warning's (was: [PATCH] aarch64: enable mixed-types for aarch64 simdclones)
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Commit Message
Hi!
On 2023-10-16T16:03:26+0100, "Andre Vieira (lists)" <andre.simoesdiasvieira@arm.com> wrote:
> --- a/gcc/testsuite/gcc.dg/vect/vect-simd-clone-1.c
> +++ b/gcc/testsuite/gcc.dg/vect/vect-simd-clone-1.c
> @@ -12,8 +12,13 @@ int array[N];
>
> #pragma omp declare simd simdlen(4) notinbranch
> #pragma omp declare simd simdlen(4) notinbranch uniform(b) linear(c:3)
> +#ifdef __aarch64__
> +#pragma omp declare simd simdlen(2) notinbranch
> +#pragma omp declare simd simdlen(2) notinbranch uniform(b) linear(c:3)
> +#else
> #pragma omp declare simd simdlen(8) notinbranch
> #pragma omp declare simd simdlen(8) notinbranch uniform(b) linear(c:3)
> +#endif
> __attribute__((noinline)) int
> foo (int a, int b, int c)
> {
These added lines run afoul with end-of-file GCN-specific DejaGnu
directives:
[...]
/* { dg-warning {unsupported simdlen 8 \(amdgcn\)} "" { target amdgcn*-*-* } 18 } */
/* { dg-warning {unsupported simdlen 4 \(amdgcn\)} "" { target amdgcn*-*-* } 18 } */
That, indeed, also has been suboptimal, to use absolute lines numbers
here. (..., and maybe, like aarch64 have now done, GCN also should
suitably parameterize the 'simdlen', to resolve this altogether?
Until then, to resolve regressions, I've pushed to master branch
commit 7b15959f8e35b821ebfe832a36e5e712b708dae1
"Update 'gcc.dg/vect/vect-simd-clone-*.c' GCN 'dg-warning's", see
attached.
Grüße
Thomas
> --- a/gcc/testsuite/gcc.dg/vect/vect-simd-clone-2.c
> +++ b/gcc/testsuite/gcc.dg/vect/vect-simd-clone-2.c
> @@ -12,8 +12,13 @@ int array[N] __attribute__((aligned (32)));
>
> #pragma omp declare simd simdlen(4) notinbranch aligned(a:16) uniform(a) linear(b)
> #pragma omp declare simd simdlen(4) notinbranch aligned(a:32) uniform(a) linear(b)
> +#ifdef __aarch64__
> +#pragma omp declare simd simdlen(2) notinbranch aligned(a:16) uniform(a) linear(b)
> +#pragma omp declare simd simdlen(2) notinbranch aligned(a:32) uniform(a) linear(b)
> +#else
> #pragma omp declare simd simdlen(8) notinbranch aligned(a:16) uniform(a) linear(b)
> #pragma omp declare simd simdlen(8) notinbranch aligned(a:32) uniform(a) linear(b)
> +#endif
> __attribute__((noinline)) void
> foo (int *a, int b, int c)
> {
> --- a/gcc/testsuite/gcc.dg/vect/vect-simd-clone-4.c
> +++ b/gcc/testsuite/gcc.dg/vect/vect-simd-clone-4.c
> @@ -12,7 +12,11 @@ float d[N];
> int e[N];
> unsigned short f[N];
>
> +#ifdef __aarch64__
> +#pragma omp declare simd simdlen(4) notinbranch uniform(b)
> +#else
> #pragma omp declare simd simdlen(8) notinbranch uniform(b)
> +#endif
> __attribute__((noinline)) float
> foo (float a, float b, float c)
> {
> --- a/gcc/testsuite/gcc.dg/vect/vect-simd-clone-5.c
> +++ b/gcc/testsuite/gcc.dg/vect/vect-simd-clone-5.c
> @@ -10,7 +10,11 @@
>
> int d[N], e[N];
>
> +#ifdef __aarch64__
> +#pragma omp declare simd simdlen(2) notinbranch uniform(b) linear(c:3)
> +#else
> #pragma omp declare simd simdlen(4) notinbranch uniform(b) linear(c:3)
> +#endif
> __attribute__((noinline)) long long int
> foo (int a, int b, int c)
> {
> --- a/gcc/testsuite/gcc.dg/vect/vect-simd-clone-8.c
> +++ b/gcc/testsuite/gcc.dg/vect/vect-simd-clone-8.c
> @@ -12,14 +12,22 @@ int a[N], b[N];
> long int c[N];
> unsigned char d[N];
>
> +#ifdef __aarch64__
> +#pragma omp declare simd simdlen(2) notinbranch
> +#else
> #pragma omp declare simd simdlen(8) notinbranch
> +#endif
> __attribute__((noinline)) int
> foo (long int a, int b, int c)
> {
> return a + b + c;
> }
>
> +#ifdef __aarch64__
> +#pragma omp declare simd simdlen(2) notinbranch
> +#else
> #pragma omp declare simd simdlen(8) notinbranch
> +#endif
> __attribute__((noinline)) long int
> bar (int a, int b, long int c)
> {
-----------------
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From 7b15959f8e35b821ebfe832a36e5e712b708dae1 Mon Sep 17 00:00:00 2001
From: Thomas Schwinge <thomas@codesourcery.com>
Date: Thu, 14 Dec 2023 10:47:35 +0100
Subject: [PATCH] Update 'gcc.dg/vect/vect-simd-clone-*.c' GCN 'dg-warning's
Recent commit f5fc001a84a7dbb942a6252b3162dd38b4aae311
"aarch64: enable mixed-types for aarch64 simdclones" added lines to those
test cases and GCN-specific line numbers got out of sync, which had
originally gotten added in commit b73c49f6f88dd7f7569f9a72c8ceb04598d4c15c
"amdgcn: OpenMP SIMD routine support".
gcc/testsuite/
* gcc.dg/vect/vect-simd-clone-1.c: Update GCN 'dg-warning's.
* gcc.dg/vect/vect-simd-clone-2.c: Likewise.
* gcc.dg/vect/vect-simd-clone-3.c: Likewise.
* gcc.dg/vect/vect-simd-clone-4.c: Likewise.
* gcc.dg/vect/vect-simd-clone-5.c: Likewise.
* gcc.dg/vect/vect-simd-clone-8.c: Likewise.
---
gcc/testsuite/gcc.dg/vect/vect-simd-clone-1.c | 5 ++---
gcc/testsuite/gcc.dg/vect/vect-simd-clone-2.c | 5 ++---
gcc/testsuite/gcc.dg/vect/vect-simd-clone-3.c | 3 +--
gcc/testsuite/gcc.dg/vect/vect-simd-clone-4.c | 3 +--
gcc/testsuite/gcc.dg/vect/vect-simd-clone-5.c | 3 +--
gcc/testsuite/gcc.dg/vect/vect-simd-clone-8.c | 5 ++---
6 files changed, 9 insertions(+), 15 deletions(-)
@@ -21,6 +21,8 @@ int array[N];
#endif
__attribute__((noinline)) int
foo (int a, int b, int c)
+/* { dg-warning {unsupported simdlen 8 \(amdgcn\)} "" { target amdgcn*-*-* } .-1 } */
+/* { dg-warning {unsupported simdlen 4 \(amdgcn\)} "" { target amdgcn*-*-* } .-2 } */
{
if (a < 30)
return 5;
@@ -62,6 +64,3 @@ main ()
abort ();
return 0;
}
-
-/* { dg-warning {unsupported simdlen 8 \(amdgcn\)} "" { target amdgcn*-*-* } 18 } */
-/* { dg-warning {unsupported simdlen 4 \(amdgcn\)} "" { target amdgcn*-*-* } 18 } */
@@ -21,6 +21,8 @@ int array[N] __attribute__((aligned (32)));
#endif
__attribute__((noinline)) void
foo (int *a, int b, int c)
+/* { dg-warning {unsupported simdlen 8 \(amdgcn\)} "" { target amdgcn*-*-* } .-1 } */
+/* { dg-warning {unsupported simdlen 4 \(amdgcn\)} "" { target amdgcn*-*-* } .-2 } */
{
a[b] = c;
}
@@ -55,6 +57,3 @@ main ()
abort ();
return 0;
}
-
-/* { dg-warning {unsupported simdlen 8 \(amdgcn\)} "" { target amdgcn*-*-* } 18 } */
-/* { dg-warning {unsupported simdlen 4 \(amdgcn\)} "" { target amdgcn*-*-* } 18 } */
@@ -13,6 +13,7 @@ int d[N], e[N];
#pragma omp declare simd simdlen(4) notinbranch uniform(b) linear(c:3)
__attribute__((noinline)) int
foo (int a, int b, int c)
+/* { dg-warning {unsupported simdlen 4 \(amdgcn\)} "" { target amdgcn*-*-* } .-1 } */
{
if (a < 30)
return 5;
@@ -43,5 +44,3 @@ main ()
abort ();
return 0;
}
-
-/* { dg-warning {unsupported simdlen 4 \(amdgcn\)} "" { target amdgcn*-*-* } 15 } */
@@ -19,6 +19,7 @@ unsigned short f[N];
#endif
__attribute__((noinline)) float
foo (float a, float b, float c)
+/* { dg-warning {unsupported simdlen 8 \(amdgcn\)} "" { target amdgcn*-*-* } .-1 } */
{
if (a < 30)
return 5.0f;
@@ -50,5 +51,3 @@ main ()
abort ();
return 0;
}
-
-/* { dg-warning {unsupported simdlen 8 \(amdgcn\)} "" { target amdgcn*-*-* } 17 } */
@@ -17,6 +17,7 @@ int d[N], e[N];
#endif
__attribute__((noinline)) long long int
foo (int a, int b, int c)
+/* { dg-warning {unsupported simdlen 4 \(amdgcn\)} "" { target amdgcn*-*-* } .-1 } */
{
return a + b + c;
}
@@ -45,5 +46,3 @@ main ()
abort ();
return 0;
}
-
-/* { dg-warning {unsupported simdlen 4 \(amdgcn\)} "" { target amdgcn*-*-* } 15 } */
@@ -19,6 +19,7 @@ unsigned char d[N];
#endif
__attribute__((noinline)) int
foo (long int a, int b, int c)
+/* { dg-warning {unsupported simdlen 8 \(amdgcn\)} "" { target amdgcn*-*-* } .-1 } */
{
return a + b + c;
}
@@ -30,6 +31,7 @@ foo (long int a, int b, int c)
#endif
__attribute__((noinline)) long int
bar (int a, int b, long int c)
+/* { dg-warning {unsupported simdlen 8 \(amdgcn\)} "" { target amdgcn*-*-* } .-1 } */
{
return a + b + c;
}
@@ -101,6 +103,3 @@ main ()
abort ();
return 0;
}
-
-/* { dg-warning {unsupported simdlen 8 \(amdgcn\)} "" { target amdgcn*-*-* } 17 } */
-/* { dg-warning {unsupported simdlen 8 \(amdgcn\)} "" { target amdgcn*-*-* } 24 } */
--
2.34.1