Message ID | 7a4ebbee1b5d902aa1fba853d5d1735b2316452b.1701967183.git.szabolcs.nagy@arm.com |
---|---|
State | Unresolved |
Headers |
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Series |
libgcc: aarch64: Add SME runtime
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Checks
Context | Check | Description |
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snail/gcc-patch-check | warning | Git am fail log |
Commit Message
Szabolcs Nagy
Dec. 7, 2023, 4:47 p.m. UTC
To support the ZA lazy save scheme, the PCS requires the unwinder to reset the SME state to PSTATE.SM=0, PSTATE.ZA=0, TPIDR2_EL0=0 on entry to an exception handler. We use the __arm_za_disable SME runtime call unconditionally to achieve this. https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst#exceptions The hidden alias is used to avoid a PLT and avoid inconsistent VPCS marking (we don't rely on special PCS at the call site). In case of static linking the SME runtime init code is linked in code that raises exceptions. libgcc/ChangeLog: * config/aarch64/__arm_za_disable.S: Add hidden alias. * config/aarch64/aarch64-unwind.h: Reset the SME state before EH return via the _Unwind_Frames_Extra hook. --- libgcc/config/aarch64/__arm_za_disable.S | 5 +++++ libgcc/config/aarch64/aarch64-unwind.h | 16 ++++++++++++++++ 2 files changed, 21 insertions(+)
diff --git a/libgcc/config/aarch64/__arm_za_disable.S b/libgcc/config/aarch64/__arm_za_disable.S index 7a888a98d49..f61d4255fdc 100644 --- a/libgcc/config/aarch64/__arm_za_disable.S +++ b/libgcc/config/aarch64/__arm_za_disable.S @@ -64,3 +64,8 @@ ENTRY (__arm_za_disable) L(end): ret END (__arm_za_disable) + +/* Hidden alias used by the unwinder. */ +.global __libgcc_arm_za_disable +.hidden __libgcc_arm_za_disable +.set __libgcc_arm_za_disable, __arm_za_disable diff --git a/libgcc/config/aarch64/aarch64-unwind.h b/libgcc/config/aarch64/aarch64-unwind.h index d669edd671b..9fe6c8f61c3 100644 --- a/libgcc/config/aarch64/aarch64-unwind.h +++ b/libgcc/config/aarch64/aarch64-unwind.h @@ -78,4 +78,20 @@ aarch64_demangle_return_addr (struct _Unwind_Context *context, return addr; } +/* SME runtime function local to libgcc, streaming compatible + and preserves more registers than the base PCS requires, but + we don't rely on that here. */ +__attribute__ ((visibility ("hidden"))) +void __libgcc_arm_za_disable (void); + +/* Disable the SME ZA state in case an unwound frame used the ZA + lazy saving scheme. */ +#undef _Unwind_Frames_Extra +#define _Unwind_Frames_Extra(x) \ + do \ + { \ + __libgcc_arm_za_disable (); \ + } \ + while (0) + #endif /* defined AARCH64_UNWIND_H && defined __ILP32__ */