diff mbox series

[2/4] RISC-V: Remove broken __builtin_riscv_zicbop_cbo_prefetchi

Message ID 68ebe422ceb2c408006b2acab94de569cf8d0e78.1698045769.git.research_trasio@irq.a4lg.com
State Unresolved
Headers
Series RISC-V: Fix 'Zicbop'-related bugs (fix ICE and remove broken built-in) |

Checks

Context Check Description
snail/gcc-patch-check warning Git am fail log

Commit Message

Tsukasa OI Oct. 23, 2023, 7:22 a.m. UTC 
  From: Tsukasa OI <research_trasio@irq.a4lg.com>

__builtin_riscv_zicbop_cbo_prefetchi (corresponding "prefetch.i"
instruction from the 'Zicbop' extension) is completely broken (not even
functional) and should be removed rather than fixing it because it has
no good way to "fix" this built-in function.

gcc/ChangeLog:

	* config/riscv/riscv-cmo.def
	(__builtin_riscv_zicbop_cbo_prefetchi): Remove since it's broken.
	* config/riscv/riscv.md
	(unspecv) Remove UNSPECV_PREI.
	(riscv_prefetchi_<mode>): Remove.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/cmo-zicbop-1.c: Remove references to
	__builtin_riscv_zicbop_cbo_prefetchi.
	* gcc.target/riscv/cmo-zicbop-2.c: Ditto with minor tidying.
---
 gcc/config/riscv/riscv-cmo.def                | 4 ----
 gcc/config/riscv/riscv.md                     | 9 ---------
 gcc/testsuite/gcc.target/riscv/cmo-zicbop-1.c | 6 ------
 gcc/testsuite/gcc.target/riscv/cmo-zicbop-2.c | 8 +-------
 4 files changed, 1 insertion(+), 26 deletions(-)
diff mbox series

Patch

diff --git a/gcc/config/riscv/riscv-cmo.def b/gcc/config/riscv/riscv-cmo.def
index 017370d1d0e3..dbd5d2f0d9eb 100644
--- a/gcc/config/riscv/riscv-cmo.def
+++ b/gcc/config/riscv/riscv-cmo.def
@@ -12,10 +12,6 @@  RISCV_BUILTIN (inval_di, "zicbom_cbo_inval", RISCV_BUILTIN_DIRECT_NO_TARGET, RIS
 RISCV_BUILTIN (zero_si, "zicboz_cbo_zero", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_VOID_PTR, zero32),
 RISCV_BUILTIN (zero_di, "zicboz_cbo_zero", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_VOID_PTR, zero64),
 
-// zicbop
-RISCV_BUILTIN (prefetchi_si, "zicbop_cbo_prefetchi", RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI, prefetch32),
-RISCV_BUILTIN (prefetchi_di, "zicbop_cbo_prefetchi", RISCV_BUILTIN_DIRECT, RISCV_UDI_FTYPE_UDI, prefetch64),
-
 // zbkc or zbc
 RISCV_BUILTIN (clmul_si, "clmul", RISCV_BUILTIN_DIRECT, RISCV_USI_FTYPE_USI_USI, clmul_zbkc32_or_zbc32),
 RISCV_BUILTIN (clmul_di, "clmul", RISCV_BUILTIN_DIRECT, RISCV_UDI_FTYPE_UDI_UDI, clmul_zbkc64_or_zbc64),
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 23d91331290b..4b445cb8be9c 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -118,7 +118,6 @@ 
   UNSPECV_FLUSH
   UNSPECV_INVAL
   UNSPECV_ZERO
-  UNSPECV_PREI
 
   ;; Zihintpause unspec
   UNSPECV_PAUSE
@@ -3493,14 +3492,6 @@ 
 }
   [(set_attr "type" "cbo")])
 
-(define_insn "riscv_prefetchi_<mode>"
-  [(unspec_volatile:X [(match_operand:X 0 "address_operand" "r")
-              (match_operand:X 1 "imm5_operand" "i")]
-              UNSPECV_PREI)]
-  "TARGET_ZICBOP"
-  "prefetch.i\t%a0"
-  [(set_attr "type" "cbo")])
-
 (define_expand "extv<mode>"
   [(set (match_operand:GPR 0 "register_operand" "=r")
 	(sign_extract:GPR (match_operand:GPR 1 "register_operand" "r")
diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicbop-1.c b/gcc/testsuite/gcc.target/riscv/cmo-zicbop-1.c
index c5d78c1763d3..54b764fb7452 100644
--- a/gcc/testsuite/gcc.target/riscv/cmo-zicbop-1.c
+++ b/gcc/testsuite/gcc.target/riscv/cmo-zicbop-1.c
@@ -13,11 +13,5 @@  void foo (char *p)
   __builtin_prefetch (p, 1, 3);
 }
 
-int foo1()
-{
-  return __builtin_riscv_zicbop_cbo_prefetchi(1);
-}
-
-/* { dg-final { scan-assembler-times "prefetch.i" 1 } } */
 /* { dg-final { scan-assembler-times "prefetch.r" 4 } } */
 /* { dg-final { scan-assembler-times "prefetch.w" 4 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicbop-2.c b/gcc/testsuite/gcc.target/riscv/cmo-zicbop-2.c
index 6576365b39ca..917adc8f2008 100644
--- a/gcc/testsuite/gcc.target/riscv/cmo-zicbop-2.c
+++ b/gcc/testsuite/gcc.target/riscv/cmo-zicbop-2.c
@@ -13,11 +13,5 @@  void foo (char *p)
   __builtin_prefetch (p, 1, 3);
 }
 
-int foo1()
-{
-  return __builtin_riscv_zicbop_cbo_prefetchi(1);
-}
-
-/* { dg-final { scan-assembler-times "prefetch.i" 1 } } */
 /* { dg-final { scan-assembler-times "prefetch.r" 4 } } */
-/* { dg-final { scan-assembler-times "prefetch.w" 4 } } */ 
+/* { dg-final { scan-assembler-times "prefetch.w" 4 } } */