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Mon, 18 Sep 2023 06:27:00 GMT Received: from smtpav05.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7434720043; Mon, 18 Sep 2023 06:27:00 +0000 (GMT) Received: from smtpav05.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 9E55020040; Mon, 18 Sep 2023 06:26:58 +0000 (GMT) Received: from [9.177.92.215] (unknown [9.177.92.215]) by smtpav05.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 18 Sep 2023 06:26:58 +0000 (GMT) Message-ID: <61b5b8a3-84b5-b3b1-f97b-31f2312dd152@linux.ibm.com> Date: Mon, 18 Sep 2023 14:26:56 +0800 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:91.0) Gecko/20100101 Thunderbird/91.6.1 Content-Language: en-US To: GCC Patches Cc: Segher Boessenkool , David Edelsohn , Peter Bergner Subject: [PATCH] rs6000: Skip empty inline asm in rs6000_update_ipa_fn_target_info [PR111366] X-TM-AS-GCONF: 00 X-Proofpoint-GUID: e8DL2okzUhR-kV4-HqbHMreiu-4OfkbL X-Proofpoint-ORIG-GUID: ztJGgC3IU1ZO_M-W-H8GLbZPnllW5QhX X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.601,FMLib:17.11.176.26 definitions=2023-09-15_20,2023-09-15_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 suspectscore=0 priorityscore=1501 malwarescore=0 bulkscore=0 adultscore=0 impostorscore=0 clxscore=1015 mlxlogscore=999 mlxscore=0 spamscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2308100000 definitions=main-2309180054 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "Kewen.Lin via Gcc-patches" From: "Kewen.Lin" Reply-To: "Kewen.Lin" Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1777355693502688068 X-GMAIL-MSGID: 1777355693502688068 Hi, PR111366 exposes one thing that can be improved in function rs6000_update_ipa_fn_target_info is to skip the given empty inline asm string, since it's impossible to adopt any hardware features (so far HTM). Since this rs6000_update_ipa_fn_target_info related approach exists in GCC12 and later, the affected project highway has updated its target pragma with ",htm", see the link: https://github.com/google/highway/commit/15e63d61eb535f478bc I'd not bother to consider an inline asm parser for now but will file a separated PR for further enhancement. Bootstrapped and regtested on powerpc64-linux-gnu P7/P8/P9 and powerpc64le-linux-gnu P9 and P10. I'm going to push this soon. BR, Kewen ----- PR target/111366 gcc/ChangeLog: * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Skip empty inline asm. gcc/testsuite/ChangeLog: * g++.target/powerpc/pr111366.C: New test. --- gcc/config/rs6000/rs6000.cc | 9 ++-- gcc/testsuite/g++.target/powerpc/pr111366.C | 48 +++++++++++++++++++++ 2 files changed, 54 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/g++.target/powerpc/pr111366.C -- 2.31.1 diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index d48134b35f8..40925407a99 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -25475,9 +25475,12 @@ rs6000_update_ipa_fn_target_info (unsigned int &info, const gimple *stmt) /* Assume inline asm can use any instruction features. */ if (gimple_code (stmt) == GIMPLE_ASM) { - /* Should set any bits we concerned, for now OPTION_MASK_HTM is - the only bit we care about. */ - info |= RS6000_FN_TARGET_INFO_HTM; + const char *asm_str = gimple_asm_string (as_a (stmt)); + /* Ignore empty inline asm string. */ + if (strlen (asm_str) > 0) + /* Should set any bits we concerned, for now OPTION_MASK_HTM is + the only bit we care about. */ + info |= RS6000_FN_TARGET_INFO_HTM; return false; } else if (gimple_code (stmt) == GIMPLE_CALL) diff --git a/gcc/testsuite/g++.target/powerpc/pr111366.C b/gcc/testsuite/g++.target/powerpc/pr111366.C new file mode 100644 index 00000000000..6d3d8ebc552 --- /dev/null +++ b/gcc/testsuite/g++.target/powerpc/pr111366.C @@ -0,0 +1,48 @@ +/* { dg-do compile } */ +/* Use -Wno-attributes to suppress the possible warning on always_inline. */ +/* { dg-options "-O2 -mdejagnu-cpu=power9 -Wno-attributes" } */ + +/* Verify it doesn't emit any error messages. */ + +#include +#define HWY_PRAGMA(tokens) _Pragma (#tokens) +#define HWY_PUSH_ATTRIBUTES(targets_str) HWY_PRAGMA (GCC target targets_str) +__attribute__ ((always_inline)) void +PreventElision () +{ + asm(""); +} +#define HWY_BEFORE_NAMESPACE() HWY_PUSH_ATTRIBUTES (",cpu=power10") +HWY_BEFORE_NAMESPACE () namespace detail +{ + template struct CappedTagChecker + { + }; +} +template +using CappedTag = detail::CappedTagChecker; +template struct ForeachCappedR +{ + static void Do (size_t, size_t) + { + CappedTag d; + Test () (int(), d); + } +}; +template struct ForPartialVectors +{ + template void operator() (T) + { + ForeachCappedR::Do (1, 1); + } +}; +struct TestFloorLog2 +{ + template void operator() (T, DF) { PreventElision (); } +}; +void +TestAllFloorLog2 () +{ + ForPartialVectors () (float()); +} +