testsuite/vect: Add target checks to refined patterns [PR113558]
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Commit Message
Hi,
on Solaris/SPARC several vector tests appeared to be regressing. They
were never vectorized but the checks before r14-3612-ge40edf64995769
would match regardless if a loop was actually vectorized or not.
The refined checks only match a successful vectorization attempt
but are run unconditionally. This patch adds target checks to them.
Bootstrapped (unnecessarily) and regtested on x86, aarch64 and
power10. Regtested on riscv and (the previous version that
missed vect-reduc-pattern-2a.c) on Solaris/SPARC by Rainer Orth.
Is this OK if Rainer's second run is successful?
Regards
Robin
gcc/testsuite/ChangeLog:
PR testsuite/113558
* gcc.dg/vect/no-scevccp-outer-7.c: Add target check.
* gcc.dg/vect/vect-outer-4c-big-array.c: Ditto.
* gcc.dg/vect/vect-reduc-dot-s16a.c: Ditto.
* gcc.dg/vect/vect-reduc-dot-s8a.c: Ditto.
* gcc.dg/vect/vect-reduc-dot-s8b.c: Ditto.
* gcc.dg/vect/vect-reduc-dot-u16b.c: Ditto.
* gcc.dg/vect/vect-reduc-dot-u8a.c: Ditto.
* gcc.dg/vect/vect-reduc-dot-u8b.c: Ditto.
* gcc.dg/vect/vect-reduc-pattern-1a.c: Ditto.
* gcc.dg/vect/vect-reduc-pattern-1b-big-array.c: Ditto.
* gcc.dg/vect/vect-reduc-pattern-1c-big-array.c: Ditto.
* gcc.dg/vect/vect-reduc-pattern-2a.c: Ditto.
* gcc.dg/vect/vect-reduc-pattern-2b-big-array.c: Ditto.
* gcc.dg/vect/wrapv-vect-reduc-dot-s8b.c: Ditto.
---
gcc/testsuite/gcc.dg/vect/no-scevccp-outer-7.c | 2 +-
gcc/testsuite/gcc.dg/vect/vect-outer-4c-big-array.c | 2 +-
gcc/testsuite/gcc.dg/vect/vect-reduc-dot-s16a.c | 2 +-
gcc/testsuite/gcc.dg/vect/vect-reduc-dot-s8a.c | 4 ++--
gcc/testsuite/gcc.dg/vect/vect-reduc-dot-s8b.c | 2 +-
gcc/testsuite/gcc.dg/vect/vect-reduc-dot-u16b.c | 2 +-
gcc/testsuite/gcc.dg/vect/vect-reduc-dot-u8a.c | 2 +-
gcc/testsuite/gcc.dg/vect/vect-reduc-dot-u8b.c | 2 +-
gcc/testsuite/gcc.dg/vect/vect-reduc-pattern-1a.c | 2 +-
gcc/testsuite/gcc.dg/vect/vect-reduc-pattern-1b-big-array.c | 2 +-
gcc/testsuite/gcc.dg/vect/vect-reduc-pattern-1c-big-array.c | 2 +-
gcc/testsuite/gcc.dg/vect/vect-reduc-pattern-2a.c | 2 +-
gcc/testsuite/gcc.dg/vect/vect-reduc-pattern-2b-big-array.c | 2 +-
gcc/testsuite/gcc.dg/vect/wrapv-vect-reduc-dot-s8b.c | 4 ++--
14 files changed, 16 insertions(+), 16 deletions(-)
Comments
On 1/24/24 07:40, Robin Dapp wrote:
> Hi,
>
> on Solaris/SPARC several vector tests appeared to be regressing. They
> were never vectorized but the checks before r14-3612-ge40edf64995769
> would match regardless if a loop was actually vectorized or not.
> The refined checks only match a successful vectorization attempt
> but are run unconditionally. This patch adds target checks to them.
>
> Bootstrapped (unnecessarily) and regtested on x86, aarch64 and
> power10. Regtested on riscv and (the previous version that
> missed vect-reduc-pattern-2a.c) on Solaris/SPARC by Rainer Orth.
>
> Is this OK if Rainer's second run is successful?
>
> Regards
> Robin
>
> gcc/testsuite/ChangeLog:
>
> PR testsuite/113558
>
> * gcc.dg/vect/no-scevccp-outer-7.c: Add target check.
> * gcc.dg/vect/vect-outer-4c-big-array.c: Ditto.
> * gcc.dg/vect/vect-reduc-dot-s16a.c: Ditto.
> * gcc.dg/vect/vect-reduc-dot-s8a.c: Ditto.
> * gcc.dg/vect/vect-reduc-dot-s8b.c: Ditto.
> * gcc.dg/vect/vect-reduc-dot-u16b.c: Ditto.
> * gcc.dg/vect/vect-reduc-dot-u8a.c: Ditto.
> * gcc.dg/vect/vect-reduc-dot-u8b.c: Ditto.
> * gcc.dg/vect/vect-reduc-pattern-1a.c: Ditto.
> * gcc.dg/vect/vect-reduc-pattern-1b-big-array.c: Ditto.
> * gcc.dg/vect/vect-reduc-pattern-1c-big-array.c: Ditto.
> * gcc.dg/vect/vect-reduc-pattern-2a.c: Ditto.
> * gcc.dg/vect/vect-reduc-pattern-2b-big-array.c: Ditto.
> * gcc.dg/vect/wrapv-vect-reduc-dot-s8b.c: Ditto.
Yes, OK if Rainer's run is successful. If you need to make similiar
changes to other tests, consider them pre-approved.
jeff
Hi Jeff,
> On 1/24/24 07:40, Robin Dapp wrote:
>> Hi,
>> on Solaris/SPARC several vector tests appeared to be regressing. They
>> were never vectorized but the checks before r14-3612-ge40edf64995769
>> would match regardless if a loop was actually vectorized or not.
>> The refined checks only match a successful vectorization attempt
>> but are run unconditionally. This patch adds target checks to them.
>> Bootstrapped (unnecessarily) and regtested on x86, aarch64 and
>> power10. Regtested on riscv and (the previous version that
>> missed vect-reduc-pattern-2a.c) on Solaris/SPARC by Rainer Orth.
>> Is this OK if Rainer's second run is successful?
>> Regards
>> Robin
>> gcc/testsuite/ChangeLog:
>> PR testsuite/113558
>> * gcc.dg/vect/no-scevccp-outer-7.c: Add target check.
>> * gcc.dg/vect/vect-outer-4c-big-array.c: Ditto.
>> * gcc.dg/vect/vect-reduc-dot-s16a.c: Ditto.
>> * gcc.dg/vect/vect-reduc-dot-s8a.c: Ditto.
>> * gcc.dg/vect/vect-reduc-dot-s8b.c: Ditto.
>> * gcc.dg/vect/vect-reduc-dot-u16b.c: Ditto.
>> * gcc.dg/vect/vect-reduc-dot-u8a.c: Ditto.
>> * gcc.dg/vect/vect-reduc-dot-u8b.c: Ditto.
>> * gcc.dg/vect/vect-reduc-pattern-1a.c: Ditto.
>> * gcc.dg/vect/vect-reduc-pattern-1b-big-array.c: Ditto.
>> * gcc.dg/vect/vect-reduc-pattern-1c-big-array.c: Ditto.
>> * gcc.dg/vect/vect-reduc-pattern-2a.c: Ditto.
>> * gcc.dg/vect/vect-reduc-pattern-2b-big-array.c: Ditto.
>> * gcc.dg/vect/wrapv-vect-reduc-dot-s8b.c: Ditto.
> Yes, OK if Rainer's run is successful. If you need to make similiar
> changes to other tests, consider them pre-approved.
sparc-sun-solaris2.11 testing just completed successfully.
Thanks.
Rainer
@@ -77,4 +77,4 @@ int main (void)
}
/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { target vect_widen_mult_hi_to_si } } } */
-/* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" } } */
+/* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" { target vect_widen_mult_hi_to_si } } } */
@@ -24,4 +24,4 @@ foo (){
}
/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { target { vect_short_mult && { ! vect_no_align } } } } } */
-/* { dg-final { scan-tree-dump-times "zero step in outer loop.(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" } } */
+/* { dg-final { scan-tree-dump-times "zero step in outer loop.(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" { target { vect_short_mult && { ! vect_no_align } } } } } */
@@ -51,7 +51,7 @@ main (void)
return 0;
}
-/* { dg-final { scan-tree-dump-times "vect_recog_dot_prod_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" } } */
+/* { dg-final { scan-tree-dump-times "vect_recog_dot_prod_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" { target { vect_sdot_hi || vect_widen_mult_hi_to_si } } } } */
/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_sdot_hi } } } */
/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_widen_mult_hi_to_si } } } */
@@ -55,8 +55,8 @@ int main (void)
return 0;
}
-/* { dg-final { scan-tree-dump-times "vect_recog_dot_prod_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" } } */
-/* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" } } */
+/* { dg-final { scan-tree-dump-times "vect_recog_dot_prod_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" { target { vect_sdot_qi || { vect_widen_mult_qi_to_hi && vect_widen_sum_hi_to_si } } } } } */
+/* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" { target { vect_sdot_qi || { vect_widen_mult_qi_to_hi && vect_widen_sum_hi_to_si } } } } } */
/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_sdot_qi } } } */
/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_widen_mult_qi_to_hi && vect_widen_sum_hi_to_si } } } } */
@@ -54,7 +54,7 @@ int main (void)
}
/* { dg-final { scan-tree-dump-times "vect_recog_dot_prod_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" { xfail *-*-* } } } */
-/* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" } } */
+/* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" { target vect_widen_mult_qi_to_hi } } } */
/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_widen_mult_qi_to_hi } } } */
@@ -46,6 +46,6 @@ int main (void)
return 0;
}
-/* { dg-final { scan-tree-dump-times "vect_recog_dot_prod_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" } } */
+/* { dg-final { scan-tree-dump-times "vect_recog_dot_prod_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" { target { vect_pack_trunc || vect_udot_hi } } } } */
/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_pack_trunc || vect_udot_hi } } } } */
@@ -53,7 +53,7 @@ int main (void)
return 0;
}
-/* { dg-final { scan-tree-dump-times "vect_recog_dot_prod_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" } } */
+/* { dg-final { scan-tree-dump-times "vect_recog_dot_prod_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" { target { vect_udot_qi || { vect_widen_mult_qi_to_hi && vect_widen_sum_qi_to_si } } } } } */
/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_udot_qi } } } */
/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_widen_mult_qi_to_hi && vect_widen_sum_qi_to_si } } } } */
@@ -45,7 +45,7 @@ int main (void)
return 0;
}
-/* { dg-final { scan-tree-dump-times "vect_recog_dot_prod_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" } } */
+/* { dg-final { scan-tree-dump-times "vect_recog_dot_prod_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" { target { { vect_widen_mult_qi_to_hi } || { vect_udot_qi || vect_unpack } } } } } */
/* When the vectorizer is enhanced to vectorize accumulation into short for
targets that support accumulation into int (powerpc, ia64) we'd have:
@@ -41,6 +41,6 @@ main (void)
return foo ();
}
-/* { dg-final { scan-tree-dump-times "vect_recog_widen_sum_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" } } */
+/* { dg-final { scan-tree-dump-times "vect_recog_widen_sum_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" { target vect_widen_sum_hi_to_si } } } */
/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_widen_sum_hi_to_si } } } */
/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { target { ! vect_widen_sum_hi_to_si } } } } */
@@ -41,6 +41,6 @@ main (void)
return foo ();
}
-/* { dg-final { scan-tree-dump-times "vect_recog_widen_sum_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" } } */
+/* { dg-final { scan-tree-dump-times "vect_recog_widen_sum_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" { target { vect_widen_sum_qi_to_si || vect_unpack } } } } */
/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_widen_sum_qi_to_si || vect_unpack } } } } */
/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { target { { ! vect_widen_sum_qi_to_si } && { ! vect_unpack } } } } } */
@@ -41,6 +41,6 @@ main (void)
return foo ();
}
-/* { dg-final { scan-tree-dump-times "vect_recog_widen_sum_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" } } */
+/* { dg-final { scan-tree-dump-times "vect_recog_widen_sum_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" { target vect_widen_sum_qi_to_hi } } } */
/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_widen_sum_qi_to_hi } } } */
/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { target { ! vect_widen_sum_qi_to_hi } } } } */
@@ -41,6 +41,6 @@ main (void)
return foo ();
}
-/* { dg-final { scan-tree-dump-times "vect_recog_widen_sum_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" } } */
+/* { dg-final { scan-tree-dump-times "vect_recog_widen_sum_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" { target vect_widen_sum_hi_to_si } } } */
/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_widen_sum_hi_to_si } } } */
/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { target { ! vect_widen_sum_hi_to_si } } } } */
@@ -42,6 +42,6 @@ main (void)
return foo ();
}
-/* { dg-final { scan-tree-dump-times "vect_recog_widen_sum_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" } } */
+/* { dg-final { scan-tree-dump-times "vect_recog_widen_sum_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" { target { vect_widen_sum_qi_to_si && vect_unpack } } } } */
/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_widen_sum_qi_to_si && vect_unpack } } } } */
/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { target { { ! vect_widen_sum_qi_to_si } && { ! vect_unpack } } } } } */
@@ -46,8 +46,8 @@ int main (void)
return 0;
}
-/* { dg-final { scan-tree-dump-times "vect_recog_dot_prod_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" } } */
-/* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" } } */
+/* { dg-final { scan-tree-dump-times "vect_recog_dot_prod_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" { target { vect_widen_mult_qi_to_hi || vect_unpack } } } } */
+/* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected(?:(?!failed)(?!Re-trying).)*succeeded" 1 "vect" { target { vect_widen_mult_qi_to_hi || vect_unpack } } } } */
/* When vectorizer is enhanced to vectorize accumulation into short for targets
that support accumulation into int (e.g. ia64) we'd have: