diff mbox series

[v3,3/3] RISC-V: Add stub support for existing extensions (unprivileged)

Message ID 50797df2bcd7368d384f87ae15121bb9c15352aa.1693280368.git.research_trasio@irq.a4lg.com
State Unresolved
Headers
Series RISC-V: Add stub support for existing extensions |

Checks

Context Check Description
snail/gcc-patch-check warning Git am fail log

Commit Message

Tsukasa OI Aug. 29, 2023, 3:39 a.m. UTC 
  From: Tsukasa OI <research_trasio@irq.a4lg.com>

After commit c283c4774d1c ("RISC-V: Throw compilation error for unknown
extensions") changed how do we handle unknown extensions, we have no
guarantee that we can share the same architectural string with Binutils
(specifically, the assembler).

To avoid compilation errors on shared Assembler-C/C++ projects or programs
with inline assembler, GCC should support almost all extensions that
Binutils support, even if the GCC itself does not touch a thing.

This commit adds stub supported standard unprivileged extensions to
riscv_ext_version_table and its implications to riscv_implied_info
(all information is copied from Binutils' bfd/elfxx-riscv.c except not yet
merged 'Zce', 'Zcmp' and 'Zcmt' support).

gcc/ChangeLog:

	* common/config/riscv/riscv-common.cc
	(riscv_implied_info): Add implications from unprivileged extensions.
	(riscv_ext_version_table): Add stub support for all unprivileged
	extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/predef-31.c: New test for a stub unprivileged
	extension 'Zcb' with some implications.
---
 gcc/common/config/riscv/riscv-common.cc    |  1 +
 gcc/testsuite/gcc.target/riscv/predef-31.c | 31 ++++++++++++++++++++++
 2 files changed, 32 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/predef-31.c

Comments

Jeff Law Aug. 29, 2023, 1:42 p.m. UTC | #1 
On 8/28/23 21:39, Tsukasa OI wrote:
> From: Tsukasa OI <research_trasio@irq.a4lg.com>
> 
> After commit c283c4774d1c ("RISC-V: Throw compilation error for unknown
> extensions") changed how do we handle unknown extensions, we have no
> guarantee that we can share the same architectural string with Binutils
> (specifically, the assembler).
> 
> To avoid compilation errors on shared Assembler-C/C++ projects or programs
> with inline assembler, GCC should support almost all extensions that
> Binutils support, even if the GCC itself does not touch a thing.
> 
> This commit adds stub supported standard unprivileged extensions to
> riscv_ext_version_table and its implications to riscv_implied_info
> (all information is copied from Binutils' bfd/elfxx-riscv.c except not yet
> merged 'Zce', 'Zcmp' and 'Zcmt' support).
> 
> gcc/ChangeLog:
> 
> 	* common/config/riscv/riscv-common.cc
> 	(riscv_implied_info): Add implications from unprivileged extensions.
> 	(riscv_ext_version_table): Add stub support for all unprivileged
> 	extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'.
> 
> gcc/testsuite/ChangeLog:
> 
> 	* gcc.target/riscv/predef-31.c: New test for a stub unprivileged
> 	extension 'Zcb' with some implications.
OK.
jeff
diff mbox series

Patch

diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc
index 8e2b3ba6d621..f142212f2edc 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -142,6 +142,7 @@  static const riscv_implied_info_t riscv_implied_info[] =
   {"zcb",  "zca"},
   {"zcmp", "zca"},
   {"zcmt", "zca"},
+  {"zcmt", "zicsr"},
 
   {"smaia", "ssaia"},
   {"smstateen", "ssstateen"},
diff --git a/gcc/testsuite/gcc.target/riscv/predef-31.c b/gcc/testsuite/gcc.target/riscv/predef-31.c
new file mode 100644
index 000000000000..4ea11442f995
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/predef-31.c
@@ -0,0 +1,31 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64i_zcb -mabi=lp64 -mcmodel=medlow -misa-spec=20191213" } */
+
+int main () {
+
+#ifndef __riscv_arch_test
+#error "__riscv_arch_test"
+#endif
+
+#if __riscv_xlen != 64
+#error "__riscv_xlen"
+#endif
+
+#if !defined(__riscv_i) || (__riscv_i != (2 * 1000 * 1000 + 1 * 1000))
+#error "__riscv_i"
+#endif
+
+#if defined(__riscv_e)
+#error "__riscv_e"
+#endif
+
+#if !defined(__riscv_zca)
+#error "__riscv_zca"
+#endif
+
+#if !defined(__riscv_zcb)
+#error "__riscv_zcb"
+#endif
+
+  return 0;
+}