diff mbox series

[GCC] aarch64: Add support for Cortex-A520 CPU

Message ID 334875a3-91f4-4f21-7c33-a61c0edb2441@arm.com
State Not Applicable
Headers
Series [GCC] aarch64: Add support for Cortex-A520 CPU |

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Context Check Description
snail/gcc-patch-check fail Git am fail log

Commit Message

Richard Ball Aug. 8, 2023, 1:04 p.m. UTC 
  This patch adds support for the Cortex-A520 CPU to GCC.

No regressions on aarch64-none-elf.

Ok for master?


gcc/ChangeLog:

         * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add 
Cortex-A520 CPU.
         * config/aarch64/aarch64-tune.md: Regenerate.
         * doc/invoke.texi: Document Cortex-A520 CPU.


###############################################


  The values @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53},
  @samp{cortex-a73.cortex-a35}, @samp{cortex-a73.cortex-a53},

Comments

Richard Sandiford Aug. 8, 2023, 7:17 p.m. UTC | #1 
Richard Ball <richard.ball@arm.com> writes:
> This patch adds support for the Cortex-A520 CPU to GCC.
>
> No regressions on aarch64-none-elf.
>
> Ok for master?
>
>
> gcc/ChangeLog:
>
>          * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add 
> Cortex-A520 CPU.
>          * config/aarch64/aarch64-tune.md: Regenerate.
>          * doc/invoke.texi: Document Cortex-A520 CPU.

OK, thanks.

Richard

> ###############################################
>
> diff --git a/gcc/config/aarch64/aarch64-cores.def 
> b/gcc/config/aarch64/aarch64-cores.def
> index 
> 2ec88c98400d5a2d7bdb954baca9e2664d2885ac..dbac497ef3aab410eb81db185b2e9532186888bb 
> 100644
> --- a/gcc/config/aarch64/aarch64-cores.def
> +++ b/gcc/config/aarch64/aarch64-cores.def
> @@ -170,6 +170,8 @@ AARCH64_CORE("cortex-r82", cortexr82, cortexa53, 
> V8R, (), cortexa53, 0x41, 0xd15
>   /* Arm ('A') cores. */
>   AARCH64_CORE("cortex-a510",  cortexa510, cortexa55, V9A, 
> (SVE2_BITPERM, MEMTAG, I8MM, BF16), cortexa53, 0x41, 0xd46, -1)
>
> +AARCH64_CORE("cortex-a520",  cortexa520, cortexa55, V9_2A, 
> (SVE2_BITPERM, MEMTAG), cortexa53, 0x41, 0xd80, -1)
> +
>   AARCH64_CORE("cortex-a710",  cortexa710, cortexa57, V9A, 
> (SVE2_BITPERM, MEMTAG, I8MM, BF16), neoversen2, 0x41, 0xd47, -1)
>
>   AARCH64_CORE("cortex-a715",  cortexa715, cortexa57, V9A, 
> (SVE2_BITPERM, MEMTAG, I8MM, BF16), neoversen2, 0x41, 0xd4d, -1)
> diff --git a/gcc/config/aarch64/aarch64-tune.md 
> b/gcc/config/aarch64/aarch64-tune.md
> index 
> 4fd35fa4884617b901b9ae6faea2f39975c4f4b2..2170980dddb0d5d410a49631ad26ff2e346b39dd 
> 100644
> --- a/gcc/config/aarch64/aarch64-tune.md
> +++ b/gcc/config/aarch64/aarch64-tune.md
> @@ -1,5 +1,5 @@
>   ;; -*- buffer-read-only: t -*-
>   ;; Generated automatically by gentune.sh from aarch64-cores.def
>   (define_attr "tune"
> - 
> "cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88p1,thunderxt88,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,ampere1a,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,cortexx1c,ares,neoversen1,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,tsv110,thunderx3t110,zeus,neoversev1,neoverse512tvb,saphira,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexa510,cortexa710,cortexa715,cortexx2,cortexx3,neoversen2,demeter,neoversev2"
> + 
> "cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88p1,thunderxt88,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,ampere1a,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,cortexx1c,ares,neoversen1,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,tsv110,thunderx3t110,zeus,neoversev1,neoverse512tvb,saphira,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexa510,cortexa520,cortexa710,cortexa715,cortexx2,cortexx3,neoversen2,demeter,neoversev2"
>       (const (symbol_ref "((enum attr_tune) aarch64_tune)")))
> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
> index 
> 104766f446d118d30e9e2bfd6cd485255f54ab5f..2c870d3c34b587ffc721b1f18f99ecd66d4217be 
> 100644
> --- a/gcc/doc/invoke.texi
> +++ b/gcc/doc/invoke.texi
> @@ -20516,8 +20516,8 @@ performance of the code.  Permissible values for 
> this option are:
>   @samp{cortex-a73.cortex-a35}, @samp{cortex-a73.cortex-a53},
>   @samp{cortex-a75.cortex-a55}, @samp{cortex-a76.cortex-a55},
>   @samp{cortex-r82}, @samp{cortex-x1}, @samp{cortex-x1c}, @samp{cortex-x2},
> -@samp{cortex-x3}, @samp{cortex-a510}, @samp{cortex-a710}, 
> @samp{cortex-a715},
> -@samp{ampere1}, @samp{ampere1a}, and @samp{native}.
> +@samp{cortex-x3}, @samp{cortex-a510}, @samp{cortex-a520}, 
> @samp{cortex-a710},
> +@samp{cortex-a715}, @samp{ampere1}, @samp{ampere1a}, and @samp{native}.
>
>   The values @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53},
>   @samp{cortex-a73.cortex-a35}, @samp{cortex-a73.cortex-a53},
diff mbox series

Patch

diff --git a/gcc/config/aarch64/aarch64-cores.def 
b/gcc/config/aarch64/aarch64-cores.def
index 
2ec88c98400d5a2d7bdb954baca9e2664d2885ac..dbac497ef3aab410eb81db185b2e9532186888bb 
100644
--- a/gcc/config/aarch64/aarch64-cores.def
+++ b/gcc/config/aarch64/aarch64-cores.def
@@ -170,6 +170,8 @@  AARCH64_CORE("cortex-r82", cortexr82, cortexa53, 
V8R, (), cortexa53, 0x41, 0xd15
  /* Arm ('A') cores. */
  AARCH64_CORE("cortex-a510",  cortexa510, cortexa55, V9A, 
(SVE2_BITPERM, MEMTAG, I8MM, BF16), cortexa53, 0x41, 0xd46, -1)

+AARCH64_CORE("cortex-a520",  cortexa520, cortexa55, V9_2A, 
(SVE2_BITPERM, MEMTAG), cortexa53, 0x41, 0xd80, -1)
+
  AARCH64_CORE("cortex-a710",  cortexa710, cortexa57, V9A, 
(SVE2_BITPERM, MEMTAG, I8MM, BF16), neoversen2, 0x41, 0xd47, -1)

  AARCH64_CORE("cortex-a715",  cortexa715, cortexa57, V9A, 
(SVE2_BITPERM, MEMTAG, I8MM, BF16), neoversen2, 0x41, 0xd4d, -1)
diff --git a/gcc/config/aarch64/aarch64-tune.md 
b/gcc/config/aarch64/aarch64-tune.md
index 
4fd35fa4884617b901b9ae6faea2f39975c4f4b2..2170980dddb0d5d410a49631ad26ff2e346b39dd 
100644
--- a/gcc/config/aarch64/aarch64-tune.md
+++ b/gcc/config/aarch64/aarch64-tune.md
@@ -1,5 +1,5 @@ 
  ;; -*- buffer-read-only: t -*-
  ;; Generated automatically by gentune.sh from aarch64-cores.def
  (define_attr "tune"
- 
"cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88p1,thunderxt88,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,ampere1a,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,cortexx1c,ares,neoversen1,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,tsv110,thunderx3t110,zeus,neoversev1,neoverse512tvb,saphira,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexa510,cortexa710,cortexa715,cortexx2,cortexx3,neoversen2,demeter,neoversev2"
+ 
"cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88p1,thunderxt88,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,ampere1a,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,cortexx1c,ares,neoversen1,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,tsv110,thunderx3t110,zeus,neoversev1,neoverse512tvb,saphira,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexa510,cortexa520,cortexa710,cortexa715,cortexx2,cortexx3,neoversen2,demeter,neoversev2"
      (const (symbol_ref "((enum attr_tune) aarch64_tune)")))
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 
104766f446d118d30e9e2bfd6cd485255f54ab5f..2c870d3c34b587ffc721b1f18f99ecd66d4217be 
100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -20516,8 +20516,8 @@  performance of the code.  Permissible values for 
this option are:
  @samp{cortex-a73.cortex-a35}, @samp{cortex-a73.cortex-a53},
  @samp{cortex-a75.cortex-a55}, @samp{cortex-a76.cortex-a55},
  @samp{cortex-r82}, @samp{cortex-x1}, @samp{cortex-x1c}, @samp{cortex-x2},
-@samp{cortex-x3}, @samp{cortex-a510}, @samp{cortex-a710}, 
@samp{cortex-a715},
-@samp{ampere1}, @samp{ampere1a}, and @samp{native}.
+@samp{cortex-x3}, @samp{cortex-a510}, @samp{cortex-a520}, 
@samp{cortex-a710},
+@samp{cortex-a715}, @samp{ampere1}, @samp{ampere1a}, and @samp{native}.