@@ -77,3 +77,5 @@
.*: Error: selected processor does not support system register name 'tcr2_el1'
.*: Error: selected processor does not support system register name 'tcr2_el12'
.*: Error: selected processor does not support system register name 'tcr2_el2'
+.*: Error: selected processor does not support system register name 'mdselr_el1'
+.*: Error: selected processor does not support system register name 'mdselr_el1'
@@ -84,3 +84,5 @@ Disassembly of section \.text:
.*: d5182060 msr tcr2_el1, x0
.*: d51d2060 msr tcr2_el12, x0
.*: d51c2060 msr tcr2_el2, x0
+.*: d5300440 mrs x0, mdselr_el1
+.*: d5100440 msr mdselr_el1, x0
\ No newline at end of file
@@ -98,3 +98,6 @@
msr tcr2_el1, x0
msr tcr2_el12, x0
msr tcr2_el2, x0
+
+ mrs x0, MDSELR_EL1
+ msr MDSELR_EL1, x0
@@ -197,6 +197,8 @@ enum aarch64_feature_bit {
AARCH64_FEATURE_S2POE,
/* Extension to Translation Control Registers. */
AARCH64_FEATURE_TCR2,
+ /* Armv8.9-A/Armv9.4-A architecture Debug extension. */
+ AARCH64_FEATURE_DEBUGv8p9,
AARCH64_NUM_FEATURES
};
@@ -267,6 +269,7 @@ enum aarch64_feature_bit {
| AARCH64_FEATBIT (X, S1POE) \
| AARCH64_FEATBIT (X, S2POE) \
| AARCH64_FEATBIT (X, TCR2) \
+ | AARCH64_FEATBIT (X, DEBUGv8p9) \
)
#define AARCH64_ARCH_V9A_FEATURES(X) (AARCH64_FEATBIT (X, V9A) \
@@ -570,6 +570,7 @@
SYSREG ("mdcr_el3", CPENC (3,6,1,3,1), 0, AARCH64_NO_FEATURES)
SYSREG ("mdrar_el1", CPENC (2,0,1,0,0), F_REG_READ, AARCH64_NO_FEATURES)
SYSREG ("mdscr_el1", CPENC (2,0,0,2,2), 0, AARCH64_NO_FEATURES)
+ SYSREG ("mdselr_el1", CPENC (2,0,0,4,2), F_ARCHEXT, AARCH64_FEATURE (DEBUGv8p9))
SYSREG ("mecid_a0_el2", CPENC (3,4,10,8,1), 0, AARCH64_NO_FEATURES)
SYSREG ("mecid_a1_el2", CPENC (3,4,10,8,3), 0, AARCH64_NO_FEATURES)
SYSREG ("mecid_p0_el2", CPENC (3,4,10,8,0), 0, AARCH64_NO_FEATURES)