From patchwork Wed Feb 14 23:15:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Andrew Pinski (QUIC)" X-Patchwork-Id: 201176 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:b825:b0:106:860b:bbdd with SMTP id da37csp42490dyb; Wed, 14 Feb 2024 15:16:34 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVGRys98b8rZVSzFG0P6LRyxoh9B9lHOz6mYVd2TJ+NjjwKF5F7lY4P44svXeqtPCmSsQU2R9lszmXl+SdXoIEGPY/NIw== X-Google-Smtp-Source: AGHT+IFxGBMon80ZDXnoSK9MRKU9yD9jgWd0cMHTuxtq1n35kFAvd3WuCSX0Q9HpM5sgPmuXIRz4 X-Received: by 2002:ac8:5fd6:0:b0:42d:aac5:66d2 with SMTP id k22-20020ac85fd6000000b0042daac566d2mr359252qta.38.1707952594141; Wed, 14 Feb 2024 15:16:34 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707952594; cv=pass; d=google.com; s=arc-20160816; b=i88drQjdz5QDZf7sh4OJQtmCLzTeAV1uLUNurCC2k6ERtBiCln0u4BZMYMhoTAIvWW dvOleBCby5y0DvlAdQemMEWRJ/uGnVyWU/J3VeCVktpVrH4la6N2k464qjJ2MXztS8mG DyjKak21EeyEunWDf5FB8D+1+C1TtyyKJVV/BdTo0C6S7Ng8vV/8BxYBjf1DAX2rpIET vynqkgAoJPtw+cfV7YyVSd/v4ESb7cU8jK62WlMUzTfhIEW2Hs+Was8LHuFlmxQIjmn2 qUbjaZNMSPjSHZItZjNshny71t92lHywDqWkpwx0OpDHrVyZISYYFbgsryRT5EtWd663 zkXw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature:arc-filter:dmarc-filter:delivered-to; bh=eZ/dStVSA1fE4pfLDyZgwqXsyFLReaS1Es40kun0G0A=; fh=o3CEdS3yGN/eIa89Zn0Kf01WYLxTE9IjKuSQGVPeOHI=; b=U2SILX5FvVZiHRgh2vJBnifcUr7SQnoWuiY637o9JlZ3d6qwvmNbx4FWTycbIVGZxa mmYxxkLLzUOYbmHahlk/k1ISj1mT9YRDoRok3CDwCdAoUeqpiPwN6DIU3ZjErvwxhu/q vKJ00Nx1/7S3af1/uXz+O3Bo+yoYyBfCNMWdTTfScW5a2qIPFSfF3F7uTTHhaYcWHl3Y hS19eIF6DbKk3Z5NizAcOH+EPsbZYw5AAz7YIocelbFg0htqzJCjgZ5SwgcCw/0BrmFl jWFdPgMK4sjac1DfYFerO+TrTLqEv4jryE2OByWlRHydpF1LOxcMZZPXU3Bwub+bJ5IT a7qQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=ETgZA8ve; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from server2.sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id j10-20020ac8664a000000b0042c391c73basi29848qtp.674.2024.02.14.15.16.34 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Feb 2024 15:16:34 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=ETgZA8ve; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 976DA386180B for ; Wed, 14 Feb 2024 23:16:33 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by sourceware.org (Postfix) with ESMTPS id 0ABFA3861031 for ; Wed, 14 Feb 2024 23:15:38 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 0ABFA3861031 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=quicinc.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 0ABFA3861031 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1707952539; cv=none; b=eD8NS3w42WEbnKfgzHMWft4rYto+ZIiysv9dfiQEGlyxjxUeBEdZVPI3st3bSUcwi9euRlD6s7sW8+S+aMcvfOniSmWkuYCc0zoVGPogiCLMb0HFiFKETk2q0++yNQf+p4sm6Ys2Q5cmMy5gOF75syVWcRu1fPf5Ge350zMkLSI= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1707952539; c=relaxed/simple; bh=tJduoYhjTQ9COhrkXpXHlvcaEHrKPGTLrNJ5lrQI0qU=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=ahDeJWzlO9GUaBqJjX/9vw0Z+rNHzx/sp3nkBTIj9EKtUV4ceiocvW5v2xD6jfwRPXMremiMy0dbGbUAKvHyZOnrczYvoWyiUclUbwBdRc6USVOGkTHoXY9kjpRAOYL7inD0TDIlwpm450RHVlq6PG7kS38TjtrOPSyqm6al+PI= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 41EMxS2e025608 for ; Wed, 14 Feb 2024 23:15:37 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= qcppdkim1; bh=eZ/dStVSA1fE4pfLDyZgwqXsyFLReaS1Es40kun0G0A=; b=ET gZA8ve1+iJdmCSB3s4TsNADT4XIOgiXJX4QgbWdrQV+SIyuUX0E0ogidzrAtsW5W topsVdBDYjq2RpV3KTRvjq3RmwS63EghqeUAujpeqaZ7q3KBYPUiK0okseoIm5/t IdaBl60yHcaqEXKFZ5f4ZpO7v9LM+TFEwmbgZ9Dl8PVvsqMKubhRGzj7Hz+r+evi gBppc6vRSS/cnicflT0hJ6rKbBXMu+FUyuIDLiWZHpwih5Qh4mfyAoyX+pB0fRSd 1vmcnrQChKCZLumGJkJpQG/ZW9/vUU59okqoONHh3B/KGQrc62athsO54hlefAYH TcF2i5kEvJqkyOEMGDHw== Received: from nasanppmta05.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3w9435rb27-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Wed, 14 Feb 2024 23:15:37 +0000 (GMT) Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 41ENFaIG003322 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Wed, 14 Feb 2024 23:15:36 GMT Received: from hu-apinski-lv.qualcomm.com (10.49.16.6) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Wed, 14 Feb 2024 15:15:36 -0800 From: Andrew Pinski To: CC: Andrew Pinski Subject: [PATCH 2/2] doc: Add documentation of which operand matches the mode of the standard pattern name [PR113508] Date: Wed, 14 Feb 2024 15:15:21 -0800 Message-ID: <20240214231521.1995779-3-quic_apinski@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240214231521.1995779-1-quic_apinski@quicinc.com> References: <20240214231521.1995779-1-quic_apinski@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01b.na.qualcomm.com (10.47.209.197) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: gc4anpwJZHRl-AKR07Yq9_VeVt9WU3cK X-Proofpoint-ORIG-GUID: gc4anpwJZHRl-AKR07Yq9_VeVt9WU3cK X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-14_14,2024-02-14_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 lowpriorityscore=0 mlxscore=0 suspectscore=0 spamscore=0 priorityscore=1501 malwarescore=0 adultscore=0 bulkscore=0 mlxlogscore=537 clxscore=1015 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2401310000 definitions=main-2402140174 X-Spam-Status: No, score=-13.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790918099473027414 X-GMAIL-MSGID: 1790918099473027414 In some of the standard pattern names, it is not obvious which mode is being used in the pattern name. Is it operand 0, 1, or 2? Is it the wider mode or the narrower mode? This fixes that so there is no confusion by adding a sentence to some of them. Built the documentation to make sure that it builds. gcc/ChangeLog: * doc/md.texi (sdot_prod@var{m}, udot_prod@var{m}, usdot_prod@var{m}, ssad@var{m}, usad@var{m}, widen_usum@var{m}3, smulhs@var{m}3, umulhs@var{m}3, smulhrs@var{m}3, umulhrs@var{m}3): Add sentence about what the mode m is. Signed-off-by: Andrew Pinski --- gcc/doc/md.texi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index 274dd03d419..33b37e79cd4 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -5746,6 +5746,7 @@ Operand 1 and operand 2 are of the same mode. Their product, which is of a wider mode, is computed and added to operand 3. Operand 3 is of a mode equal or wider than the mode of the product. The result is placed in operand 0, which is of the same mode as operand 3. +@var{m} is the mode of operand 1 and operand 2. Semantically the expressions perform the multiplication in the following signs @@ -5763,6 +5764,7 @@ Operand 1 and operand 2 are of the same mode. Their product, which is of a wider mode, is computed and added to operand 3. Operand 3 is of a mode equal or wider than the mode of the product. The result is placed in operand 0, which is of the same mode as operand 3. +@var{m} is the mode of operand 1 and operand 2. Semantically the expressions perform the multiplication in the following signs @@ -5779,6 +5781,7 @@ Operand 1 must be unsigned and operand 2 signed. Their product, which is of a wider mode, is computed and added to operand 3. Operand 3 is of a mode equal or wider than the mode of the product. The result is placed in operand 0, which is of the same mode as operand 3. +@var{m} is the mode of operand 1 and operand 2. Semantically the expressions perform the multiplication in the following signs @@ -5797,6 +5800,7 @@ Operand 1 and operand 2 are of the same mode. Their absolute difference, which is of a wider mode, is computed and added to operand 3. Operand 3 is of a mode equal or wider than the mode of the absolute difference. The result is placed in operand 0, which is of the same mode as operand 3. +@var{m} is the mode of operand 1 and operand 2. @cindex @code{widen_ssum@var{m}3} instruction pattern @cindex @code{widen_usum@var{m}3} instruction pattern @@ -5806,6 +5810,7 @@ Operands 0 and 2 are of the same mode, which is wider than the mode of operand 1. Add operand 1 to operand 2 and place the widened result in operand 0. (This is used express accumulation of elements into an accumulator of a wider mode.) +@var{m} is the mode of operand 1. @cindex @code{smulhs@var{m}3} instruction pattern @cindex @code{umulhs@var{m}3} instruction pattern @@ -5819,6 +5824,8 @@ op0 = (narrow) (((wide) op1 * (wide) op2) >> (N / 2 - 1)); @end smallexample where the sign of @samp{narrow} determines whether this is a signed or unsigned operation, and @var{N} is the size of @samp{wide} in bits. +@var{m} is the mode for all 3 operands (narrow). The wide mode is not specified +and is defined to fit the whole multiply. @cindex @code{smulhrs@var{m}3} instruction pattern @cindex @code{umulhrs@var{m}3} instruction pattern @@ -5833,6 +5840,8 @@ op0 = (narrow) (((((wide) op1 * (wide) op2) >> (N / 2 - 2)) + 1) >> 1); @end smallexample where the sign of @samp{narrow} determines whether this is a signed or unsigned operation, and @var{N} is the size of @samp{wide} in bits. +@var{m} is the mode for all 3 operands (narrow). The wide mode is not specified +and is defined to fit the whole multiply. @cindex @code{sdiv_pow2@var{m}3} instruction pattern @cindex @code{sdiv_pow2@var{m}3} instruction pattern