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Wed, 24 Jan 2024 07:01:16 +0000 (GMT) Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 40O71FWl013701 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Wed, 24 Jan 2024 07:01:15 GMT Received: from hu-apinski-lv.qualcomm.com (10.49.16.6) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Tue, 23 Jan 2024 23:01:15 -0800 From: Andrew Pinski To: CC: Andrew Pinski Subject: [PATCH] aarch64: Fix movv8di for overlapping register and memory load [PR113550] Date: Tue, 23 Jan 2024 23:01:03 -0800 Message-ID: <20240124070103.3800874-1-quic_apinski@quicinc.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01b.na.qualcomm.com (10.47.209.197) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 5Q83j8r3Tw3ASNkan_ziBnPMltPdh2WX X-Proofpoint-GUID: 5Q83j8r3Tw3ASNkan_ziBnPMltPdh2WX X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-24_02,2024-01-23_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 spamscore=0 mlxlogscore=802 mlxscore=0 bulkscore=0 phishscore=0 malwarescore=0 adultscore=0 impostorscore=0 priorityscore=1501 clxscore=1015 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2401190000 definitions=main-2401240050 X-Spam-Status: No, score=-13.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1788954248073108891 X-GMAIL-MSGID: 1788954248073108891 The split for movv8di is not ready to handle the case where the setting register overlaps with the address of the memory that is being load. Fixing the split than just making the output constraint as an early clobber for this alternative. The split would first need to figure out which register is overlapping with the address and then only emit that move last. Build and tested for aarch64-linux-gnu with no regressions gcc/ChangeLog: * config/aarch64/aarch64-simd.md (*aarch64_movv8di): Mark the last alternative's output constraint as an early clobber. Signed-off-by: Andrew Pinski --- gcc/config/aarch64/aarch64-simd.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index 662ef696630..ba079298b84 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -7985,7 +7985,7 @@ (define_insn "*aarch64_mov" ) (define_insn "*aarch64_movv8di" - [(set (match_operand:V8DI 0 "nonimmediate_operand" "=r,m,r") + [(set (match_operand:V8DI 0 "nonimmediate_operand" "=r,m,&r") (match_operand:V8DI 1 "general_operand" " r,r,m"))] "(register_operand (operands[0], V8DImode) || register_operand (operands[1], V8DImode))"