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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id vw1-20020a05620a564100b00783222b6ed5si4588704qkn.535.2024.01.21.20.14.16 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 21 Jan 2024 20:14:16 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 1A7CF385840D for ; Mon, 22 Jan 2024 04:14:16 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from zg8tndyumtaxlji0oc4xnzya.icoremail.net (zg8tndyumtaxlji0oc4xnzya.icoremail.net [46.101.248.176]) by sourceware.org (Postfix) with ESMTP id E7F703858D3C for ; Mon, 22 Jan 2024 04:13:34 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org E7F703858D3C Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=eswincomputing.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=eswincomputing.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org E7F703858D3C Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=46.101.248.176 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1705896818; cv=none; b=b4v2SBaxhiWxBWMKbZ0FgJsobYvSPylA4wNFd2cV+N4KiwCFYQyO+y+z+zYH4S631f+/7edTnQARb16lNornRH7H+ufw+6M83lnMbnS/kBK2i5Bs7IVnBq2eY9Yl3athCw4Q2vozanfaFjD3ZIV9JzVq+k8f3UqPl/xjl8X8J4M= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1705896818; c=relaxed/simple; bh=J5OWZS4tLRYj4IQgrBZi/LijwTH+jDJKFlzwRTSDSYc=; h=From:To:Subject:Date:Message-Id; b=XFnaVfd7jOU132S7HJpwND3VgOdWR82iwq0uJyszPSMmgCjzm9+2pe8Y+617p009jxUmN0upkF0SukLvNGVA5mDtgMoj9m3U/nGToslQajHU4f6gKhGtDmUptIKNCbeQqlbyU0O/WPZRX8ObmX/00XWUiSSKaHfZ9GKw6hFq+Aw= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from host014-ubuntu-1804.lxd (unknown [10.12.130.31]) by app1 (Coremail) with SMTP id TAJkCgA3tvvl6q1lG1gHAA--.50008S4; Mon, 22 Jan 2024 12:11:18 +0800 (CST) From: Li Xu To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, palmer@dabbelt.com, juzhe.zhong@rivai.ai, xuli Subject: [PATCH v2] RISC-V: Bugfix for resolve_overloaded_builtin[PR113420] Date: Mon, 22 Jan 2024 04:11:31 +0000 Message-Id: <20240122041131.27552-1-xuli1@eswincomputing.com> X-Mailer: git-send-email 2.17.1 X-CM-TRANSID: TAJkCgA3tvvl6q1lG1gHAA--.50008S4 X-Coremail-Antispam: 1UD129KBjvJXoW3GFykGF43Gw1DZFy3JFyDAwb_yoWfArykpa 43G3y2krW8JF4fXr1rtF48Gr15Gr4kG345J3yxJ34xAF4ayrZFyFyDKF1xJFyUGFy5WF1D JFWUuw47Zr4UJF7anT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUkY14x267AKxVW8JVW5JwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26ryj6F1UM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4j 6F4UM28EF7xvwVC2z280aVAFwI0_GcCE3s1l84ACjcxK6I8E87Iv6xkF7I0E14v26rxl6s 0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xII jxv20xvE14v26r1j6r18McIj6I8E87Iv67AKxVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr0_Gr 1lF7xvr2IYc2Ij64vIr41lF7I21c0EjII2zVCS5cI20VAGYxC7MxkIecxEwVCm-wCF04k2 0xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI 8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_JF0_Jw1lIxkGc2Ij64vIr41l IxAIcVC0I7IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Jr0_Gr1lIx AIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r4UMIIF0xvEx4A2 jsIEc7CjxVAFwI0_Jr0_GrUvcSsGvfC2KfnxnUUI43ZEXa7VUbXdbUUUUUU== X-CM-SenderInfo: 50xoxi46hv4xpqfrz1xxwl0woofrz/ X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_ASCII_DIVIDERS, KAM_DMARC_STATUS, KAM_SHORT, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1788762502061138740 X-GMAIL-MSGID: 1788762502061138740 From: xuli v2: Avoid internal ICE for the case below. vint8mf8_t test_vle8_v_i8mf8_m(vbool64_t vm, const int32_t *rs1, size_t vl) { return __riscv_vle8(vm, rs1, vl); } v1: Change the hash value of overloaded intrinsic from considering all parameter types to: 1. Encoding vector data type 2. In order to distinguish vle8_v_i8mf8_m(vbool64_t vm, const int8_t *rs1, size_t vl) and vle8_v_u8mf8_m(vbool64_t vm, const uint8_t *rs1, size_t vl), encode the pointer type 3. In order to distinguish vfadd_vv_f32mf2_rm(vfloat32mf2_t vs2, vfloat32mf2_t vs1, size_t vl) and vfadd_vv_f32mf2(vfloat32mf2_t vs2, vfloat32mf2_t vs1, size_t vl), encode the number of parameters. The same goes for the vxrm intrinsics. PR target/113420 gcc/ChangeLog: * config/riscv/riscv-vector-builtins.cc (has_vxrm_or_frm_p):remove. (registered_function::overloaded_hash):refacotr. (resolve_overloaded_builtin):avoid interal ICE. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/pr113420-1.c: New test. * gcc.target/riscv/rvv/base/pr113420-2.c: New test. --- gcc/config/riscv/riscv-vector-builtins.cc | 93 ++++--------------- .../gcc.target/riscv/rvv/base/pr113420-1.c | 30 ++++++ .../gcc.target/riscv/rvv/base/pr113420-2.c | 31 +++++++ 3 files changed, 77 insertions(+), 77 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/pr113420-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/pr113420-2.c diff --git a/gcc/config/riscv/riscv-vector-builtins.cc b/gcc/config/riscv/riscv-vector-builtins.cc index 25e0b6e56de..c0e7af482da 100644 --- a/gcc/config/riscv/riscv-vector-builtins.cc +++ b/gcc/config/riscv/riscv-vector-builtins.cc @@ -4271,24 +4271,22 @@ registered_function::overloaded_hash () const : TYPE_UNSIGNED (type); mode_p = POINTER_TYPE_P (type) ? TYPE_MODE (TREE_TYPE (type)) : TYPE_MODE (type); - h.add_int (unsigned_p); - h.add_int (mode_p); + if (POINTER_TYPE_P (type) || lookup_vector_type_attribute (type)) + { + h.add_int (unsigned_p); + h.add_int (mode_p); + } + else if (instance.base->may_require_vxrm_p () + || instance.base->may_require_frm_p ()) + { + h.add_int (argument_types.length ()); + break; + } } return h.end (); } -bool -has_vxrm_or_frm_p (function_instance &instance, const vec &arglist) -{ - if (instance.base->may_require_vxrm_p () - || (instance.base->may_require_frm_p () - && (TREE_CODE (TREE_TYPE (arglist[arglist.length () - 2])) - == INTEGER_TYPE))) - return true; - return false; -} - hashval_t registered_function::overloaded_hash (const vec &arglist) { @@ -4296,68 +4294,8 @@ registered_function::overloaded_hash (const vec &arglist) unsigned int len = arglist.length (); for (unsigned int i = 0; i < len; i++) - { - /* vint8m1_t __riscv_vget_i8m1(vint8m2_t src, size_t index); - When the user calls vget intrinsic, the __riscv_vget_i8m1(src, 1) - form is used. The compiler recognizes that the parameter index is signed - int, which is inconsistent with size_t, so the index is converted to - size_t type in order to get correct hash value. vint8m2_t - __riscv_vset(vint8m2_t dest, size_t index, vint8m1_t value); The reason - is the same as above. */ - if ((instance.base == bases::vget && (i == (len - 1))) - || ((instance.base == bases::vset - || instance.shape == shapes::crypto_vi) - && (i == (len - 2)))) - argument_types.safe_push (size_type_node); - /* Vector fixed-point arithmetic instructions requiring argument vxrm. - For example: vuint32m4_t __riscv_vaaddu(vuint32m4_t vs2, - vuint32m4_t vs1, unsigned int vxrm, size_t vl); The user calls vaaddu - intrinsic in the form of __riscv_vaaddu(vs2, vs1, 2, vl). The compiler - recognizes that the parameter vxrm is a signed int, which is inconsistent - with the parameter unsigned int vxrm declared by intrinsic, so the - parameter vxrm is converted to an unsigned int type in order to get - correct hash value. - - Vector Floating-Point Instructions requiring argument frm. - DEF_RVV_FUNCTION (vfadd, alu, full_preds, f_vvv_ops) - DEF_RVV_FUNCTION (vfadd_frm, alu_frm, full_preds, f_vvv_ops) - Taking vfadd as an example, theoretically we can add base or shape to the - hash value to distinguish whether the frm parameter is required. - vfloat32m1_t __riscv_vfadd(vfloat32m1_t vs2, float32_t rs1, size_t vl); - vfloat32m1_t __riscv_vfadd(vfloat32m1_t vs2, vfloat32m1_t vs1, unsigned int - frm, size_t vl); - - However, the current registration mechanism of overloaded intinsic for gcc - limits the intrinsic obtained by entering the hook to always be vfadd, not - vfadd_frm. Therefore, the correct hash value cannot be obtained through the - parameter list and overload name, base or shape. - +--------+---------------------------+-------------------+ - | index | name | kind | - +--------+---------------------------+-------------------+ - | 124733 | __riscv_vfadd | Overloaded | <- Hook fun code - +--------+---------------------------+-------------------+ - | 124735 | __riscv_vfadd_vv_f32m1 | Non-overloaded | - +--------+---------------------------+-------------------+ - | 124737 | __riscv_vfadd | Placeholder | - +--------+---------------------------+-------------------+ - | ... | - +--------+---------------------------+-------------------+ - | ... | - +--------+---------------------------+-------------------+ - | 125739 | __riscv_vfadd | Overloaded | - +--------+---------------------------+-------------------+ - | 125741 | __riscv_vfadd_vv_f32m1_rm | Non-overloaded | - +--------+---------------------------+-------------------+ - | 125743 | __riscv_vfadd | Placeholder | - +--------+---------------------------+-------------------+ - - Therefore, the hash value cannot be added with base or shape, and needs - to be distinguished by whether the penultimate parameter is INTEGER_TYPE. */ - else if (has_vxrm_or_frm_p (instance, arglist) && (i == (len - 2))) - argument_types.safe_push (unsigned_type_node); - else - argument_types.safe_push (TREE_TYPE (arglist[i])); - } + argument_types.safe_push (TREE_TYPE (arglist[i])); + return overloaded_hash (); } @@ -4611,8 +4549,9 @@ resolve_overloaded_builtin (unsigned int code, vec *arglist) hashval_t hash = rfun->overloaded_hash (*arglist); registered_function *rfn = non_overloaded_function_table->find_with_hash (rfun, hash); - gcc_assert (rfn); - return rfn->decl; + if (rfn) + return rfn->decl; + return NULL_TREE; } function_instance diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr113420-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr113420-1.c new file mode 100644 index 00000000000..d17f22804ff --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr113420-1.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */ + +#include "riscv_vector.h" + +void +matrix_transpose_intrinsics (float *dst, float *src, size_t n) +{ + for (size_t row_id = 0; row_id < n; ++row_id) + { // input row-index + size_t avl = n; + // source pointer to row_id-th row + float *row_src = src + row_id * n; + // destination pointer to row_id-th column + float *row_dst = dst + row_id; + while (avl > 0) + { + size_t vl = __riscv_vsetvl_e32m1 (avl); + vfloat32m1_t row = __riscv_vle32_v_f32m1 (row_src, vl); + __riscv_vsse32 (row_dst, sizeof (float) * n, row, vl); + // updating application vector length + avl -= vl; + // updating source and destination pointers + row_src += vl; + row_dst += vl * n; + } + } +} + +/* { dg-final { scan-assembler-times {vsse32\.v} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr113420-2.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr113420-2.c new file mode 100644 index 00000000000..76bdc01f94d --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr113420-2.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */ + +#include "riscv_vector.h" + +vint8mf8_t +test_vle8_v_i8mf8_m (vbool64_t vm, const int8_t *rs1, size_t vl) +{ + return __riscv_vle8 (vm, rs1, vl); +} + +vuint8mf8_t +test_vle8_v_u8mf8_m (vbool64_t vm, const uint8_t *rs1, size_t vl) +{ + return __riscv_vle8 (vm, rs1, vl); +} + +vfloat32mf2_t +test_vfadd_vv_f32mf2 (vfloat32mf2_t vs2, vfloat32mf2_t vs1, size_t vl) +{ + return __riscv_vfadd (vs2, vs1, vl); +} + +vfloat32mf2_t +test_vfadd_vv_f32mf2_rm (vfloat32mf2_t vs2, vfloat32mf2_t vs1, size_t vl) +{ + return __riscv_vfadd (vs2, vs1, __RISCV_FRM_RNE, vl); +} + +/* { dg-final { scan-assembler-times {vle8\.v} 2 } } */ +/* { dg-final { scan-assembler-times {vfadd\.v} 2 } } */