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[8.43.85.97]) by mx.google.com with ESMTPS id l13-20020a05622a050d00b0042981fd7905si1529549qtx.497.2024.01.08.23.09.52 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Jan 2024 23:09:52 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=O51Czw8o; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 3D8F83858422 for ; Tue, 9 Jan 2024 07:09:52 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.93]) by sourceware.org (Postfix) with ESMTPS id C7F253858C66 for ; Tue, 9 Jan 2024 07:09:05 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org C7F253858C66 Authentication-Results: sourceware.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=fail smtp.mailfrom=gmail.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org C7F253858C66 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=192.55.52.93 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1704784147; cv=none; b=BcgajbYa++hyPzRtCw81z3KsShNNQClxeOGr87fCFEoqlvDAuVfZzQo0pvE+Fj/qGCRj8wliZx6V97ONmuIoGrZ9xZGYhmgoV8oMIK9/yM5hbTWjLs1ze00Q4i6ztIaekIyltcsEJSAdguEXzu+Y6jeDIdrHWgPtLvQJqFGeFgs= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1704784147; c=relaxed/simple; bh=GPgGje/rWEuWgy1RatRuLcWuqwkQikysiPe3cVrLR14=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=baQOp6HYAUPSw4DcCxMT9TAez6Ljstq4hDedSudnb47vKGDGEFSdfIa4iWkaQiLrOKeRYuG3q8rLf0zF+5LzUW777XhPxLEjeD3RM1IiiPqTrDu9WfpZeKpZo1X6qX5LMZiM/G5gMHaSp596lHFm2uRocNnGmtWhPQxkV5XgA4c= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1704784145; x=1736320145; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=GPgGje/rWEuWgy1RatRuLcWuqwkQikysiPe3cVrLR14=; b=O51Czw8oog/aZLPbSnZFuKbDQs7/bzxfh3zVmDv8W9k671tN+W3+Stwh SQsT4YvVCsRgNm5qYEjsR9Rhad/MAC/A424tBEIluGX8154kGgJVKlmPb ZMgS3dWGdzAgYD3o+KYFTe1TNNPgPOEKbIw2B54kALai6wkfnCOr+dxfi IkohwJk+NmFxKNeXKSd/PBShekCYxYv/6QnD1hpwXXjnnh1MJxglHVFBI bWgwhr1xcL83+NJbSHfgyoGGp2HgfN3IesrwpBg5F68HWyIqYyZDDKXUl 3sDNsgi/ClRRNNkdKDJ9g6qMjDJ/FiKt+3stoajDDcnBY1Np3lXZKZ5NG Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10947"; a="395268438" X-IronPort-AV: E=Sophos;i="6.04,182,1695711600"; d="scan'208";a="395268438" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2024 23:09:04 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10947"; a="731378872" X-IronPort-AV: E=Sophos;i="6.04,182,1695711600"; d="scan'208";a="731378872" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by orsmga003.jf.intel.com with ESMTP; 08 Jan 2024 23:09:03 -0800 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 4904210079C1; Tue, 9 Jan 2024 15:09:02 +0800 (CST) From: Hongyu Wang To: gcc-patches@gcc.gnu.org Cc: hongtao.liu@intel.com Subject: [PATCH] i386: [APX] Document inline asm behavior and new switch for APX Date: Tue, 9 Jan 2024 15:07:02 +0800 Message-Id: <20240109070702.413866-1-hongyu.wang@intel.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM, GIT_PATCH_0, HEADER_FROM_DIFFERENT_DOMAINS, SPF_HELO_NONE, SPF_SOFTFAIL, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1787595789721415860 X-GMAIL-MSGID: 1787595789721415860 Hi, For APX, the inline asm behavior was not mentioned in any document before. Add description for it. Ok for trunk? gcc/ChangeLog: * config/i386/i386.opt: Adjust document. * doc/invoke.texi: Add description for -mapx-inline-asm-use-gpr32. --- gcc/config/i386/i386.opt | 3 +-- gcc/doc/invoke.texi | 7 +++++++ 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt index a38e92baf92..5b4f1bff25f 100644 --- a/gcc/config/i386/i386.opt +++ b/gcc/config/i386/i386.opt @@ -1357,8 +1357,7 @@ Enum(apx_features) String(all) Value(apx_all) Set(1) mapx-inline-asm-use-gpr32 Target Var(ix86_apx_inline_asm_use_gpr32) Init(0) -Enable GPR32 in inline asm when APX_EGPR enabled, do not -hook reg or mem constraint in inline asm to GPR16. +Enable GPR32 in inline asm when APX_F enabled. mevex512 Target Mask(ISA2_EVEX512) Var(ix86_isa_flags2) Save diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 68d1f364ac0..47fd96648d8 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -35272,6 +35272,13 @@ r8-r15 registers so that the call and jmp instruction length is 6 bytes to allow them to be replaced with @samp{lfence; call *%r8-r15} or @samp{lfence; jmp *%r8-r15} at run-time. +@opindex mapx-inline-asm-use-gpr32 +@item -mapx-inline-asm-use-gpr32 +When APX_F enabled, EGPR usage was by default disabled to prevent +unexpected EGPR generation in instructions that does not support it. +To invoke EGPR usage in inline asm, use this switch to allow EGPR in +inline asm, while user should ensure the asm actually supports EGPR. + @end table These @samp{-m} switches are supported in addition to the above