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[Committed] RISC-V: Add failed SLP testcase

Message ID 20231214074752.6196-1-juzhe.zhong@rivai.ai
State Accepted
Headers
Series [Committed] RISC-V: Add failed SLP testcase |

Checks

Context Check Description
snail/gcc-patch-check success Github commit url

Commit Message

juzhe.zhong@rivai.ai Dec. 14, 2023, 7:47 a.m. UTC 
  After recent RVV cost model tweak, I found this PR issue has been fixed.

Add testcase and committed.

	PR target/112387

gcc/testsuite/ChangeLog:

	* gcc.dg/vect/costmodel/riscv/rvv/pr112387.c: New test.

---
 .../vect/costmodel/riscv/rvv/pr112387.c       | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
 create mode 100644 gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr112387.c
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Patch

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr112387.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr112387.c
new file mode 100644
index 00000000000..ee44b5f09e8
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr112387.c
@@ -0,0 +1,19 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+void
+f2 (uint64_t *__restrict y, uint64_t *__restrict x,
+    uint64_t *__restrict indices, uint64_t n)
+{
+  for (int64_t i = 0; i < n; ++i)
+    {
+      y[i * 2] = x[indices[i * 2]] + 1;
+      y[i * 2 + 1] = x[indices[i * 2 + 1]] + 2;
+    }
+}
+
+/* { dg-final { scan-tree-dump "Loop contains only SLP stmts" vect } } */
+/* { dg-final { scan-assembler-not "vlseg" } } */
+/* { dg-final { scan-assembler-not "vsseg" } } */