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[Committed] RISC-V: Fix ICE in extract_single_source

Message ID 20231211073019.2352703-1-juzhe.zhong@rivai.ai
State Accepted
Headers
Series [Committed] RISC-V: Fix ICE in extract_single_source |

Checks

Context Check Description
snail/gcc-patch-check success Github commit url

Commit Message

juzhe.zhong@rivai.ai Dec. 11, 2023, 7:30 a.m. UTC 
  This patch fixes the following ICE in VSETVL PASS:
bug.c:39:1: internal compiler error: Segmentation fault
   39 | }
      | ^
0x1ad5a08 crash_signal
        ../../../../gcc/gcc/toplev.cc:316
0x7f7f55feb90f ???
        ./signal/../sysdeps/unix/sysv/linux/x86_64/libc_sigaction.c:0
0x218d7c7 extract_single_source
        ../../../../gcc/gcc/config/riscv/riscv-vsetvl.cc:583
0x218d95d extract_single_source
        ../../../../gcc/gcc/config/riscv/riscv-vsetvl.cc:604
0x218fbc5 pre_vsetvl::compute_lcm_local_properties()
        ../../../../gcc/gcc/config/riscv/riscv-vsetvl.cc:2703
0x2190ef4 pre_vsetvl::earliest_fuse_vsetvl_info()
        ../../../../gcc/gcc/config/riscv/riscv-vsetvl.cc:2890
0x2193e62 pass_vsetvl::lazy_vsetvl()
        ../../../../gcc/gcc/config/riscv/riscv-vsetvl.cc:3537
0x219406a pass_vsetvl::execute(function*)
        ../../../../gcc/gcc/config/riscv/riscv-vsetvl.cc:3584

The rootcause we have a case that the def info can not be traced:

(insn 208 327 333 27 (use (reg/i:DI 10 a0)) "bug.c":36:1 -1
     (nil))

It's obvious, we conservatively disable any optimization in this situation if
AVL def_info can not be tracded.

Committed as it is obvious.

gcc/ChangeLog:

	* config/riscv/riscv-vsetvl.cc (extract_single_source): Fix ICE.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/vsetvl/avl_use_bug-1.c: New test.

---
 gcc/config/riscv/riscv-vsetvl.cc              |  2 +
 .../riscv/rvv/vsetvl/avl_use_bug-1.c          | 39 +++++++++++++++++++
 2 files changed, 41 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_use_bug-1.c
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Patch

diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc
index 90477f331d7..ed5a2b58ab0 100644
--- a/gcc/config/riscv/riscv-vsetvl.cc
+++ b/gcc/config/riscv/riscv-vsetvl.cc
@@ -579,6 +579,8 @@  extract_single_source (set_info *set)
   if (!set->insn ()->is_phi ())
     return nullptr;
   hash_set<set_info *> sets = get_all_sets (set, true, false, true);
+  if (sets.is_empty ())
+    return nullptr;
 
   insn_info *first_insn = (*sets.begin ())->insn ();
   if (first_insn->is_artificial ())
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_use_bug-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_use_bug-1.c
new file mode 100644
index 00000000000..330221c2d7b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_use_bug-1.c
@@ -0,0 +1,39 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_zvl256b -mabi=lp64 --param=riscv-autovec-lmul=m8 --param=riscv-autovec-preference=fixed-vlmax -O2" } */
+
+struct a_struct
+{
+  unsigned char a_character;
+};
+
+struct a_struct an_array[5];
+struct a_struct *a_ptr;
+int yabba = 1;
+
+int
+f (a, b)
+     unsigned char a;
+     unsigned long b;
+{
+  long i, j, p, q, r, s;
+
+  if (b != (unsigned long) 0)
+    {
+      if (yabba)
+	return -1;
+      s = 4000000 / b;
+      for (i = 0; i < 11; i++)
+	{
+	  for (j = 0; j < 256; j++)
+	    {
+	      if (((p - s < 0) ? -s : 0) < (( q - s < 0) ? -s : q))
+		r = i;
+	    }
+	}
+    }
+
+  if (yabba)
+    return 0;
+  a_ptr = &an_array[a];
+  a_ptr->a_character = (unsigned char) r;
+}