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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id pm1-20020ad446c1000000b0067a1557eb78si1608591qvb.198.2023.12.08.00.01.26 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Dec 2023 00:01:26 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=Eufj3zBY; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id B09283858035 for ; Fri, 8 Dec 2023 08:01:26 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) by sourceware.org (Postfix) with ESMTPS id 51BE03858C36 for ; Fri, 8 Dec 2023 08:00:52 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 51BE03858C36 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 51BE03858C36 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=198.175.65.10 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702022462; cv=none; b=bYqCzIn64p7Yuaou1Yxi8bSXv/S7xJUQ77a8rh2SGM2SHx5rVSyJd0GoxT9unglWTqZUwPNAtSamWcLhpo1ehNYHF8u2eU1gt+hjW0V0+MsnAtPUIqx7GlNDl09cFcjG9NPFdoNKyeEzaRU6EhQ3bCSbjKmX/8e00Oh0YmwhlQA= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702022462; c=relaxed/simple; bh=S843bLLQLISuZdtK6+w3KftMe86IJ1pYm1Mtg8Tl0AI=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=Jv948Zc85SytRVQp6JxFdRcc+lR+xwshSvgiJofJXo7N2yieWrx7Tq1MImF9Y6ZMN2OgIQYUCRh8bLqOSif1Pxj9lZJK/vrtXAKYkyl23KcF6ZfUinPr3rK3V9IixY+5GYbgdRRFmXJSk1jC45pSw+EObxIwKY3wG+3b3h+VLDo= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1702022453; x=1733558453; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=S843bLLQLISuZdtK6+w3KftMe86IJ1pYm1Mtg8Tl0AI=; b=Eufj3zBYevqhYlNJKxayaahyzETCdQhCtkZ6xQmHmk+NlKlLwIhcLOrk 5oNDjbdviJAyrv2WEcuIr9/gDlepGI4UJvzhXzAfMpx6g8vACVSbEnT/q hdSUKvlX2O9JClfdnKiZI6/Sj63jRfc1SVtgURnP4RuvzFQUNoUOf2w4Z L8tuIEfcmiuDrpV/KbOjleCgKPCQuXXUzXpHj7q1JOoEvclDC1tb3t/Ik XWlkR3GhLL+eK31eKAlenRdbyYjlaYENuXRU218P5mmvIN6OfGHOFA9oW x0iXBL9jIqlVWh640J9cHQLO59e+wEJdObQaMlStiNuR8HDcsnZivG+9Q g==; X-IronPort-AV: E=McAfee;i="6600,9927,10917"; a="7735118" X-IronPort-AV: E=Sophos;i="6.04,260,1695711600"; d="scan'208";a="7735118" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2023 00:00:51 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10917"; a="748256265" X-IronPort-AV: E=Sophos;i="6.04,260,1695711600"; d="scan'208";a="748256265" Received: from shvmail02.sh.intel.com ([10.239.244.9]) by orsmga006.jf.intel.com with ESMTP; 08 Dec 2023 00:00:49 -0800 Received: from pli-ubuntu.sh.intel.com (pli-ubuntu.sh.intel.com [10.239.159.47]) by shvmail02.sh.intel.com (Postfix) with ESMTP id 60412100568A; Fri, 8 Dec 2023 16:00:48 +0800 (CST) From: pan2.li@intel.com To: gcc-patches@gcc.gnu.org Cc: juzhe.zhong@rivai.ai, pan2.li@intel.com, yanzhang.wang@intel.com, kito.cheng@gmail.com Subject: [PATCH v1] RISC-V: Fix ICE for incorrect mode attr in V_F2DI_CONVERT_BRIDGE Date: Fri, 8 Dec 2023 16:00:47 +0800 Message-Id: <20231208080047.875024-1-pan2.li@intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Spam-Status: No, score=-11.2 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784699931212773432 X-GMAIL-MSGID: 1784699931212773432 From: Pan Li The mode attr V_F2DI_CONVERT_BRIDGE converts the floating-point mode to the widden floating-point by design. But we take (RVVM1HF "RVVM2SI") by mistake. This patch would like to fix it by replacing the (RVVM1HF "RVVM2SI") to (RVVM1HF "RVVM2SF") as design. gcc/ChangeLog: * config/riscv/vector-iterators.md: Replace RVVM2SI to RVVM2SF for mode attr V_F2DI_CONVERT_BRIDGE. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/unop/math-lroundf16-rv64-ice-1.c: New test. Signed-off-by: Pan Li Signed-off-by: Pan Li --- gcc/config/riscv/vector-iterators.md | 2 +- .../riscv/rvv/autovec/unop/math-lroundf16-rv64-ice-1.c | 7 +++++++ 2 files changed, 8 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-lroundf16-rv64-ice-1.c diff --git a/gcc/config/riscv/vector-iterators.md b/gcc/config/riscv/vector-iterators.md index 56080ed1f5f..5f5f7b5b986 100644 --- a/gcc/config/riscv/vector-iterators.md +++ b/gcc/config/riscv/vector-iterators.md @@ -3267,7 +3267,7 @@ (define_mode_attr v_f2di_convert [ ]) (define_mode_attr V_F2DI_CONVERT_BRIDGE [ - (RVVM2HF "RVVM4SF") (RVVM1HF "RVVM2SI") (RVVMF2HF "RVVM1SF") + (RVVM2HF "RVVM4SF") (RVVM1HF "RVVM2SF") (RVVMF2HF "RVVM1SF") (RVVMF4HF "RVVMF2SF") (RVVM4SF "VOID") (RVVM2SF "VOID") (RVVM1SF "VOID") diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-lroundf16-rv64-ice-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-lroundf16-rv64-ice-1.c new file mode 100644 index 00000000000..5fb61c7b44c --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-lroundf16-rv64-ice-1.c @@ -0,0 +1,7 @@ +/* Test that we do not have ice when compile */ +/* { dg-do compile } */ +/* { dg-options "--param=riscv-autovec-lmul=m4 -march=rv64gcv_zvfh_zfh -mabi=lp64d -O3 -ftree-vectorize -fno-vect-cost-model -ffast-math -fno-schedule-insns -fno-schedule-insns2" } */ + +#include "test-math.h" + +TEST_UNARY_CALL_CVT (_Float16, long, __builtin_lroundf16)