@@ -14006,57 +14006,63 @@ (define_expand "one_cmpl<mode>2"
[(set (match_operand:SDWIM 0 "nonimmediate_operand")
(not:SDWIM (match_operand:SDWIM 1 "nonimmediate_operand")))]
""
- "ix86_expand_unary_operator (NOT, <MODE>mode, operands); DONE;")
+ "ix86_expand_unary_operator (NOT, <MODE>mode, operands,
+ TARGET_APX_NDD); DONE;")
(define_insn_and_split "*one_cmpl<dwi>2_doubleword"
- [(set (match_operand:<DWI> 0 "nonimmediate_operand" "=ro")
- (not:<DWI> (match_operand:<DWI> 1 "nonimmediate_operand" "0")))]
- "ix86_unary_operator_ok (NOT, <DWI>mode, operands)"
+ [(set (match_operand:<DWI> 0 "nonimmediate_operand" "=ro,&r")
+ (not:<DWI> (match_operand:<DWI> 1 "nonimmediate_operand" "0,ro")))]
+ "ix86_unary_operator_ok (NOT, <DWI>mode, operands, TARGET_APX_NDD)"
"#"
"&& reload_completed"
[(set (match_dup 0)
(not:DWIH (match_dup 1)))
(set (match_dup 2)
(not:DWIH (match_dup 3)))]
- "split_double_mode (<DWI>mode, &operands[0], 2, &operands[0], &operands[2]);")
+ "split_double_mode (<DWI>mode, &operands[0], 2, &operands[0], &operands[2]);"
+ [(set_attr "isa" "*,apx_ndd")])
(define_insn "*one_cmpl<mode>2_1"
- [(set (match_operand:SWI248 0 "nonimmediate_operand" "=rm,?k")
- (not:SWI248 (match_operand:SWI248 1 "nonimmediate_operand" "0,k")))]
- "ix86_unary_operator_ok (NOT, <MODE>mode, operands)"
+ [(set (match_operand:SWI248 0 "nonimmediate_operand" "=rm,r,?k")
+ (not:SWI248 (match_operand:SWI248 1 "nonimmediate_operand" "0,rm,k")))]
+ "ix86_unary_operator_ok (NOT, <MODE>mode, operands, TARGET_APX_NDD)"
"@
not{<imodesuffix>}\t%0
+ not{<imodesuffix>}\t{%1, %0|%0, %1}
#"
- [(set_attr "isa" "*,<kmov_isa>")
- (set_attr "type" "negnot,msklog")
+ [(set_attr "isa" "*,apx_ndd,<kmov_isa>")
+ (set_attr "type" "negnot,negnot,msklog")
(set_attr "mode" "<MODE>")])
(define_insn "*one_cmplsi2_1_zext"
- [(set (match_operand:DI 0 "register_operand" "=r,?k")
+ [(set (match_operand:DI 0 "register_operand" "=r,r,?k")
(zero_extend:DI
- (not:SI (match_operand:SI 1 "register_operand" "0,k"))))]
- "TARGET_64BIT && ix86_unary_operator_ok (NOT, SImode, operands)"
+ (not:SI (match_operand:SI 1 "nonimmediate_operand" "0,rm,k"))))]
+ "TARGET_64BIT && ix86_unary_operator_ok (NOT, SImode, operands,
+ TARGET_APX_NDD)"
"@
not{l}\t%k0
+ not{l}\t{%1, %k0|%k0, %1}
#"
- [(set_attr "isa" "x64,avx512bw_512")
- (set_attr "type" "negnot,msklog")
- (set_attr "mode" "SI,SI")])
+ [(set_attr "isa" "x64,apx_ndd,avx512bw_512")
+ (set_attr "type" "negnot,negnot,msklog")
+ (set_attr "mode" "SI,SI,SI")])
(define_insn "*one_cmplqi2_1"
- [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,r,?k")
- (not:QI (match_operand:QI 1 "nonimmediate_operand" "0,0,k")))]
- "ix86_unary_operator_ok (NOT, QImode, operands)"
+ [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,r,r,?k")
+ (not:QI (match_operand:QI 1 "nonimmediate_operand" "0,0,rm,k")))]
+ "ix86_unary_operator_ok (NOT, QImode, operands, TARGET_APX_NDD)"
"@
not{b}\t%0
not{l}\t%k0
+ not{b}\t{%1, %0|%0, %1}
#"
- [(set_attr "isa" "*,*,avx512f")
- (set_attr "type" "negnot,negnot,msklog")
+ [(set_attr "isa" "*,*,apx_ndd,avx512f")
+ (set_attr "type" "negnot,negnot,negnot,msklog")
(set (attr "mode")
(cond [(eq_attr "alternative" "1")
(const_string "SI")
- (and (eq_attr "alternative" "2")
+ (and (eq_attr "alternative" "3")
(match_test "!TARGET_AVX512DQ"))
(const_string "HI")
]
@@ -14086,14 +14092,16 @@ (define_insn_and_split "*one_cmpl<mode>_1_slp"
(define_insn "*one_cmpl<mode>2_2"
[(set (reg FLAGS_REG)
- (compare (not:SWI (match_operand:SWI 1 "nonimmediate_operand" "0"))
+ (compare (not:SWI (match_operand:SWI 1 "nonimmediate_operand" "0,rm"))
(const_int 0)))
- (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m")
+ (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,r")
(not:SWI (match_dup 1)))]
"ix86_match_ccmode (insn, CCNOmode)
- && ix86_unary_operator_ok (NOT, <MODE>mode, operands)"
+ && ix86_unary_operator_ok (NOT, <MODE>mode, operands,
+ TARGET_APX_NDD)"
"#"
[(set_attr "type" "alu1")
+ (set_attr "isa" "*,apx_ndd")
(set_attr "mode" "<MODE>")])
(define_split
@@ -76,6 +76,15 @@ F (int, neg, -)
F1 (int, neg, -)
F (long, neg, -)
F1 (long, neg, -)
+
+F (char, not, ~)
+F1 (char, not, ~)
+F (short, not, ~)
+F1 (short, not, ~)
+F (int, not, ~)
+F1 (int, not, ~)
+F (long, not, ~)
+F1 (long, not, ~)
/* { dg-final { scan-assembler-times "add(?:b|l|w|q)\[^\n\r]*1, \\(%rdi\\), %(?:|r|e)a(?:x|l)" 4 } } */
/* { dg-final { scan-assembler-times "lea(?:l|q)\[^\n\r]\\(%r(?:d|s)i,%r(?:d|s)i\\), %(?:|r|e)ax" 4 } } */
/* { dg-final { scan-assembler-times "add(?:b|l|w|q)\[^\n\r]%(?:|r|e)si(?:|l), \\(%rdi\\), %(?:|r|e)a(?:x|l)" 4 } } */
@@ -84,3 +93,5 @@ F1 (long, neg, -)
/* { dg-final { scan-assembler-times "negb\[^\n\r]\\(%rdi\\), %(?:|r|e)al" 1 } } */
/* { dg-final { scan-assembler-times "neg(?:l|w|q)\[^\n\r]\\(%rdi\\), %(?:|r|e)ax" 3 } } */
/* { dg-final { scan-assembler-times "neg(?:l|w|q)\[^\n\r]%(?:|r|e)di, %(?:|r|e)ax" 4 } } */
+/* { dg-final { scan-assembler-times "not(?:b|l|w|q)\[^\n\r]\\(%rdi\\), %(?:|r|e)a(?:x|l)" 4 } } */
+/* { dg-final { scan-assembler-times "not(?:l|w|q)\[^\n\r]%(?:|r|e)di, %(?:|r|e)ax" 4 } } */