From patchwork Tue Dec 5 08:12:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fei Gao X-Patchwork-Id: 173789 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:bcd1:0:b0:403:3b70:6f57 with SMTP id r17csp3280373vqy; Tue, 5 Dec 2023 00:14:42 -0800 (PST) X-Google-Smtp-Source: AGHT+IHBrus8ybnnbmnfM2Zs9+ttRNi1ebS/G6bRkMLq1ROx8zdfC3lDl2U1782lZ4A6+4EsbPBQ X-Received: by 2002:ac8:5852:0:b0:425:4043:41d9 with SMTP id h18-20020ac85852000000b00425404341d9mr1086775qth.133.1701764081960; Tue, 05 Dec 2023 00:14:41 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1701764081; cv=pass; d=google.com; s=arc-20160816; b=vUO6mdUpEAnLIL2U6BFHWTScbNcqp3zFHfvZD2Fa2Woh4mUln0vDYZjfy/n4owUjmM dmsJtt9wU0jVge/iddAsyDSCyfi6W2SFVlJe9nzHLdJ2WBq/M+/gITYeKgTM+Bse1yEg 33qcC94isH0LRB0QL3EiuGn3B8khZj1jOSiQs8QAkv8ehq74uglhcnpTLlXyco1Vbk4V 5W+MUjzAa/u5pMQssxQ4pvfjqwMBH0v9dEbyFIKBfYe1k+MfHbu7ccKsor5jGMFvlYZX HOu/sAAEz84aJ2D4u5fCLvtHJkDHAlEEhnkJ8+0b608FxM8MSKXvdXT58EuefA7y4dV5 vUEA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:cc:to:from:arc-filter:dmarc-filter :delivered-to; bh=rftbt9Gd04FEW7cmI5exUO5XMfEvMXvOl1pBg72EjQg=; fh=kjyqxvhW9T/cdC9f5Zwozm2U9voTqjiPjY35YTUnYVs=; b=FZBe4+lKYdwv2YYudFb9DHwXi5clbaTNzX79neeCEfRxSaM/ovwp9hYM7ERCSf+2Md OKKm7lPGQm+R/ANmgK6foi8KT/VM5nrOEjAC5+qMUTc2Bpf5hpt75SmNp2JtQlIww0SS UDHqUKYhAhusP47xbZIJhh9FMfJ+1gxBum9vC6XEkSjlfQd3rLO0QFM970YwN6QRCGOe 65+q41iLwrK/off//Bet9pyDosd41gZfgLEWq5ZeI3qeF58ldC7XcyVtPuCn+pw9MUtm X7p9fNgS9M/4SVDCName99rXAAAuu//4TK9SI+73Kc4jp0KutlN6WBShH9Px5Odo/KH0 wmww== ARC-Authentication-Results: i=2; mx.google.com; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id u39-20020a05622a19a700b00423d64d4491si11943457qtc.71.2023.12.05.00.14.41 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Dec 2023 00:14:41 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id BD7E43847733 for ; Tue, 5 Dec 2023 08:14:38 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from azure-sdnproxy.icoremail.net (azure-sdnproxy.icoremail.net [52.237.72.81]) by sourceware.org (Postfix) with ESMTP id 8D68A3858D39 for ; Tue, 5 Dec 2023 08:13:52 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 8D68A3858D39 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=eswincomputing.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=eswincomputing.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 8D68A3858D39 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=52.237.72.81 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1701764035; cv=none; b=SQkHrKioGCKWz/aAJl2yIiWZ5nWjl2iQ+mrWEtXLlb2fRM1iDQydmyRkmuIzVOAGa8qdcBQzpyx5ylxIDdfpr5UC3l6rJElPpRm8Vse9XiXqBMOaSjXSp7tjyJLLz+fV9Sjv/E76tumkN38HLQUnWfh/DLVb7j/f1XwchCiBe84= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1701764035; c=relaxed/simple; bh=kfOG83ud3Zs+/jFZtUozhCJeD+5pZvBc3ZBbBPjWFNM=; h=From:To:Subject:Date:Message-Id; b=GSvW9/Pqs+aX1iuJpakg/YyeOBssImMKSMAfiUpwIcRF64ZtjRhy0cLHz+ZzI1pZt3sfVmFJMQObxcNqeNgaKcHwkW88Cjp7kyHMUYx70Hg0RTgsQaVwKLNrJRdgAZjqpOmF8XVn2720wFckZr08w+KVV4PceprYtdgK5KpHVYk= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from localhost.localdomain (unknown [10.12.130.31]) by app2 (Coremail) with SMTP id TQJkCgBH1tR2225lPkgAAA--.4441S6; Tue, 05 Dec 2023 16:12:41 +0800 (CST) From: Fei Gao To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, palmer@dabbelt.com, jeffreyalaw@gmail.com, zengxiao@eswincomputing.com, Fei Gao Subject: [PATCH 3/5] [ifcvt] optimize x=c ? (y AND z) : y by RISC-V Zicond like insns Date: Tue, 5 Dec 2023 08:12:46 +0000 Message-Id: <20231205081248.2106-3-gaofei@eswincomputing.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231205081248.2106-1-gaofei@eswincomputing.com> References: <20231205081248.2106-1-gaofei@eswincomputing.com> X-CM-TRANSID: TQJkCgBH1tR2225lPkgAAA--.4441S6 X-Coremail-Antispam: 1UD129KBjvJXoWxKr15XF47Wr1kuw1kAFWDArb_yoWxAF1UpF W3G345Krs3JFyrGF48XFy3JFnI9w1Ygw1UGrn7trWfCwnxZrZYkr18tw12kr13JF4rXF17 CayDAFZFgF17Ja7anT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUB214x267AKxVW5JVWrJwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2048vs2IY020E87I2jVAFwI0_Jryl82xGYIkIc2 x26xkF7I0E14v26r4j6ryUM28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48ve4kI8wA2z4x0 Y4vE2Ix0cI8IcVAFwI0_tr0E3s1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI0_Gr1j6F4UJw A2z4x0Y4vEx4A2jsIE14v26rxl6s0DM28EF7xvwVC2z280aVCY1x0267AKxVW0oVCq3wAS 0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0I7IYx2 IY67AKxVWUJVWUGwAv7VC2z280aVAFwI0_Jr0_Gr1lOx8S6xCaFVCjc4AY6r1j6r4UM4x0 Y48IcxkI7VAKI48JM4x0x7Aq67IIx4CEVc8vx2IErcIFxwCY02Avz4vE-syl42xK82IYc2 Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s02 6x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r126r1DMIIYrxkI7VAKI48JMIIF0x vE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r4j6F4UMIIF0xvE 42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6x kF7I0E14v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjfU873vUUUUU X-CM-SenderInfo: xjdrwv3l6h245lqf0zpsxwx03jof0z/ X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784428974224781414 X-GMAIL-MSGID: 1784428974224781414 Take the following case for example. CFLAGS: -march=rv64gc_zbb_zicond -mabi=lp64d -O2 long test_AND_ceqz (long x, long y, long z, long c) { if (c) x = y & z; else x = y; return x; } Before patch: and a2,a1,a2 czero.eqz a0,a2,a3 czero.nez a3,a1,a3 or a0,a3,a0 ret After patch: and a0,a1,a2 czero.nez a1,a1,a3 or a0,a1,a0 ret Co-authored-by: Xiao Zeng gcc/ChangeLog: * ifcvt.cc (noce_cond_zero_binary_op_supported): Add support for AND. (noce_bbs_ok_for_cond_zero_arith): Likewise. (noce_try_cond_zero_arith): Likewise. gcc/testsuite/ChangeLog: * gcc.target/riscv/zicond_ifcvt_opt.c: add TCs for AND. --- gcc/ifcvt.cc | 69 ++++++-- .../gcc.target/riscv/zicond_ifcvt_opt.c | 163 +++++++++++++++++- 2 files changed, 211 insertions(+), 21 deletions(-) diff --git a/gcc/ifcvt.cc b/gcc/ifcvt.cc index 2efae21ebfe..29f33f956eb 100644 --- a/gcc/ifcvt.cc +++ b/gcc/ifcvt.cc @@ -2922,7 +2922,7 @@ noce_cond_zero_binary_op_supported (rtx op) if (opcode == PLUS || opcode == MINUS || opcode == IOR || opcode == XOR || opcode == ASHIFT || opcode == ASHIFTRT || opcode == LSHIFTRT - || opcode == ROTATE || opcode == ROTATERT) + || opcode == ROTATE || opcode == ROTATERT || opcode == AND) return true; return false; @@ -2954,6 +2954,7 @@ get_base_reg (rtx exp) static bool noce_bbs_ok_for_cond_zero_arith (struct noce_if_info *if_info, rtx *common_ptr, + rtx *bin_exp_ptr, enum rtx_code *czero_code_ptr, rtx *a_ptr, rtx **to_replace) { @@ -2998,7 +2999,7 @@ noce_bbs_ok_for_cond_zero_arith (struct noce_if_info *if_info, rtx *common_ptr, { common = b; bin_op1 = XEXP (bin_exp, 1); - czero_code = reverse + czero_code = (reverse ^ (GET_CODE (bin_exp) == AND)) ? noce_reversed_cond_code (if_info) : GET_CODE (cond); } @@ -3016,6 +3017,7 @@ noce_bbs_ok_for_cond_zero_arith (struct noce_if_info *if_info, rtx *common_ptr, return false; *common_ptr = common; + *bin_exp_ptr = bin_exp; *czero_code_ptr = czero_code; *a_ptr = a; @@ -3029,38 +3031,67 @@ noce_bbs_ok_for_cond_zero_arith (struct noce_if_info *if_info, rtx *common_ptr, static int noce_try_cond_zero_arith (struct noce_if_info *if_info) { - rtx target, a; + rtx target, rtmp, a; rtx_insn *seq; machine_mode mode = GET_MODE (if_info->x); rtx common = NULL_RTX; enum rtx_code czero_code = UNKNOWN; + rtx bin_exp = NULL_RTX; + enum rtx_code bin_code = UNKNOWN; rtx non_zero_op = NULL_RTX; rtx *to_replace = NULL; - if (!noce_bbs_ok_for_cond_zero_arith (if_info, &common, &czero_code, &a, - &to_replace)) + if (!noce_bbs_ok_for_cond_zero_arith (if_info, &common, &bin_exp, &czero_code, + &a, &to_replace)) return false; - non_zero_op = *to_replace; - start_sequence (); - /* If x is used in both input and out like x = c ? x + z : x, - use a new reg to avoid modifying x */ - if (common && rtx_equal_p (common, if_info->x)) - target = gen_reg_rtx (mode); - else - target = if_info->x; + bin_code = GET_CODE (bin_exp); - target = noce_emit_czero (if_info, czero_code, non_zero_op, target); - if (!target || !to_replace) + if (bin_code == AND) { - end_sequence (); - return false; + rtmp = gen_reg_rtx (mode); + noce_emit_move_insn (rtmp, a); + + target = noce_emit_czero (if_info, czero_code, common, if_info->x); + if (!target) + { + end_sequence (); + return false; + } + + target = expand_simple_binop (mode, IOR, rtmp, target, if_info->x, 0, + OPTAB_WIDEN); + if (!target) + { + end_sequence (); + return false; + } + + if (target != if_info->x) + noce_emit_move_insn (if_info->x, target); } + else + { + non_zero_op = *to_replace; + /* If x is used in both input and out like x = c ? x + z : x, + use a new reg to avoid modifying x */ + if (common && rtx_equal_p (common, if_info->x)) + target = gen_reg_rtx (mode); + else + target = if_info->x; - *to_replace = target; - noce_emit_move_insn (if_info->x, a); + target = noce_emit_czero (if_info, czero_code, non_zero_op, target); + if (!target || !to_replace) + { + end_sequence (); + return false; + } + + *to_replace = target; + noce_emit_move_insn (if_info->x, a); + } seq = end_ifcvt_sequence (if_info); if (!seq || !targetm.noce_conversion_profitable_p (seq, if_info)) diff --git a/gcc/testsuite/gcc.target/riscv/zicond_ifcvt_opt.c b/gcc/testsuite/gcc.target/riscv/zicond_ifcvt_opt.c index ab5a4909b61..d5310690539 100644 --- a/gcc/testsuite/gcc.target/riscv/zicond_ifcvt_opt.c +++ b/gcc/testsuite/gcc.target/riscv/zicond_ifcvt_opt.c @@ -615,5 +615,164 @@ test_RotateR_eqz (unsigned long x, unsigned long y, unsigned long z, return x; } -/* { dg-final { scan-assembler-times {czero\.eqz} 33 } } */ -/* { dg-final { scan-assembler-times {czero\.nez} 28 } } */ +long +test_AND_ceqz (long x, long y, long z, long c) +{ + if (c) + x = y & z; + else + x = y; + return x; +} + +long +test_AND_ceqz_x (long x, long z, long c) +{ + if (c) + x = x & z; + + return x; +} + +long +test_AND_nez (long x, long y, long z, long c) +{ + if (c) + x = y; + else + x = y & z; + return x; +} + +long +test_AND_nez_x (long x, long z, long c) +{ + if (c) + { + } + else + x = x & z; + return x; +} + +long +test_AND_nez_2 (long x, long y, long z, long c) +{ + if (!c) + x = y & z; + else + x = y; + return x; +} + +long +test_AND_nez_x_2 (long x, long z, long c) +{ + if (!c) + x = x & z; + + return x; +} + +long +test_AND_eqz_2 (long x, long y, long z, long c) +{ + if (!c) + x = y; + else + x = y & z; + return x; +} + +long +test_AND_eqz_x_2 (long x, long z, long c) +{ + if (!c) + { + } + else + x = x & z; + return x; +} + +long +test_AND_ceqz_reverse_bin_oprands (long x, long y, long z, long c) +{ + if (c) + x = z & y; + else + x = y; + return x; +} + +long +test_AND_ceqz_x_reverse_bin_oprands (long x, long z, long c) +{ + if (c) + x = z & x; + + return x; +} + +long +test_AND_nez_reverse_bin_oprands (long x, long y, long z, long c) +{ + if (c) + x = y; + else + x = z & y; + return x; +} + +long +test_AND_nez_x_reverse_bin_oprands (long x, long z, long c) +{ + if (c) + { + } + else + x = z & x; + return x; +} + +long +test_AND_nez_2_reverse_bin_oprands (long x, long y, long z, long c) +{ + if (!c) + x = z & y; + else + x = y; + return x; +} + +long +test_AND_nez_x_2_reverse_bin_oprands (long x, long z, long c) +{ + if (!c) + x = z & x; + + return x; +} + +long +test_AND_eqz_2_reverse_bin_oprands (long x, long y, long z, long c) +{ + if (!c) + x = y; + else + x = z & y; + return x; +} + +long +test_AND_eqz_x_2_reverse_bin_oprands (long x, long z, long c) +{ + if (!c) + { + } + else + x = z & x; + return x; +} +/* { dg-final { scan-assembler-times {czero\.eqz} 41 } } */ +/* { dg-final { scan-assembler-times {czero\.nez} 36 } } */