diff mbox series

RISC-V: Add explicit braces to eliminate warning.

Message ID 20231129084628.1431-1-xuli1@eswincomputing.com
State Unresolved
Headers
Series RISC-V: Add explicit braces to eliminate warning. |

Checks

Context Check Description
snail/gcc-patch-check warning Git am fail log

Commit Message

Li Xu Nov. 29, 2023, 8:46 a.m. UTC 
  From: xuli <xuli1@eswincomputing.com>

../.././gcc/gcc/config/riscv/riscv.cc: In function ‘void riscv_option_override()’:
../.././gcc/gcc/config/riscv/riscv.cc:8673:6: warning: suggest explicit braces to avoid ambiguous ‘else’ [-Wdangling-else]
   if (TARGET_RVE)
      ^

gcc/ChangeLog:

	* config/riscv/riscv.cc (riscv_option_override): Eliminate warning.
---
 gcc/config/riscv/riscv.cc | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

Comments

juzhe.zhong@rivai.ai Nov. 29, 2023, 8:47 a.m. UTC | #1 
LGTM. Thanks for fixing it.



juzhe.zhong@rivai.ai
 
From: Li Xu
Date: 2023-11-29 16:46
To: gcc-patches
CC: kito.cheng; palmer; juzhe.zhong; xuli
Subject: [PATCH] RISC-V: Add explicit braces to eliminate warning.
From: xuli <xuli1@eswincomputing.com>
 
../.././gcc/gcc/config/riscv/riscv.cc: In function ‘void riscv_option_override()’:
../.././gcc/gcc/config/riscv/riscv.cc:8673:6: warning: suggest explicit braces to avoid ambiguous ‘else’ [-Wdangling-else]
   if (TARGET_RVE)
      ^
 
gcc/ChangeLog:
 
* config/riscv/riscv.cc (riscv_option_override): Eliminate warning.
---
gcc/config/riscv/riscv.cc | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
 
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index a4fc858fb50..2f8d391579a 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -8671,10 +8671,12 @@ riscv_option_override (void)
   /* RVE requires specific ABI.  */
   if (TARGET_RVE)
-    if (!TARGET_64BIT && riscv_abi != ABI_ILP32E)
-      error ("rv32e requires ilp32e ABI");
-    else if (TARGET_64BIT && riscv_abi != ABI_LP64E)
-      error ("rv64e requires lp64e ABI");
+    {
+      if (!TARGET_64BIT && riscv_abi != ABI_ILP32E)
+ error ("rv32e requires ilp32e ABI");
+      else if (TARGET_64BIT && riscv_abi != ABI_LP64E)
+ error ("rv64e requires lp64e ABI");
+    }
   /* Zfinx require abi ilp32, ilp32e, lp64 or lp64e.  */
   if (TARGET_ZFINX
-- 
2.17.1
diff mbox series

Patch

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index a4fc858fb50..2f8d391579a 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -8671,10 +8671,12 @@  riscv_option_override (void)
 
   /* RVE requires specific ABI.  */
   if (TARGET_RVE)
-    if (!TARGET_64BIT && riscv_abi != ABI_ILP32E)
-      error ("rv32e requires ilp32e ABI");
-    else if (TARGET_64BIT && riscv_abi != ABI_LP64E)
-      error ("rv64e requires lp64e ABI");
+    {
+      if (!TARGET_64BIT && riscv_abi != ABI_ILP32E)
+	error ("rv32e requires ilp32e ABI");
+      else if (TARGET_64BIT && riscv_abi != ABI_LP64E)
+	error ("rv64e requires lp64e ABI");
+    }
 
   /* Zfinx require abi ilp32, ilp32e, lp64 or lp64e.  */
   if (TARGET_ZFINX